JPH0118457B

PURPOSE:To manage with only one virtual address converting mechanism in a system, by providing a memory control part with an address converting mechanism which converts an accessed virtual address into the actual address of a memory part. CONSTITUTION:Memory requests from a processor are all supplied as virtual addresses on a common bus 11 and set in a virtual address register 21; and a conversion table 30 is stored in a memory part 16, and a high-speed buffer (TLB) 22 wherein accessed address information is stored is provided at a control part. The V bit 61 and C bit 62 of the TLB22 indicate the current states of corresponding pages, and when the V bit 61 is a 0, it is shown that the contents of the corresponding page of the TLB22 are insignificant data; when a 1, 1, the paging of the page is in process and when a 1, 0, the page is stored in the memory part 16, showing memory access is possible. When the 1, 1, only access from a file control processor is permitted.