GATE ARRAY TYPE SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To improve the integration of a gate array type semiconductor integrated circuit by arraying basic cells formed with P- and N-channel MOS transistors, and a basic cell formed with a bipolar transistor and an impedance element in response to using frequency. CONSTITUTION:A basic cell 1 formed with P- and N-channel MOS transistors is arrayed between power source wiring regions VCC and VSS, and a basic cell 2 formed with bipolar transistors 3, 4 and an impedance element 5 is disposed at every plurality of cells 1. When a Z-type bi-C-MOS inverter circuit is composed, the cells l are used for MOS transistors 6, 7, and the cells 2 are used for bipolar transistors 8, 9 and impedance elements 10, 11. Since the circuit which employs the cells 2 is used only at a limited position, such as an output node, a wasteful area is deleted, thereby improving its integration.