MONOLITHIC ELECTRONIC DEVICE

PURPOSE: To reduce a space occupied by a decoder by providing one decoder common to a memory plane composed of a ROM and a memory plane composed of a programmable memory. CONSTITUTION: This integrated circuit is provided with a processor 1 for data processing, a memory 2 for processing, and a memory...

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Hauptverfasser: ROORAN SURUJIYAN, JIRU RIJIMATSUKU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE: To reduce a space occupied by a decoder by providing one decoder common to a memory plane composed of a ROM and a memory plane composed of a programmable memory. CONSTITUTION: This integrated circuit is provided with a processor 1 for data processing, a memory 2 for processing, and a memory plane 3. The memory plane 3 is a mixed memory plane and is provided with a memory plane 4 having a ROM cell. The memory plane 3 is provided also with a memory plane 5 having a programmable memory cell. The memory 2 for processing is connected to the processor 1 for data processing through a bus 6, a decoder 7 for bit line, and a decoder 8 for word line. The memory plane 3 is connected to the processor 1 for data processing through the same bus 6 and the single decoder common to two memory planes 4 and 5. This single decoder is provided with a decoder 9 for bit line and a decoder 10 for word line, and a preliminarily programmed simple instruction 11 is stored in the monolithic integrated circuit.