BUS INTERFACE

PURPOSE:To accelerate data transfer by providing a means forcibly writing residual data in a main memory device when a read demand for the address, in which the data of a data buffer is remained, comes. CONSTITUTION:An adaptor device 5 is disposed between a high speed bus 3a and a medium speed bus 3b and the data buffer 24 temporarily storing the data is provided corresponding to each channel to the adaptor device 5. Then, the mutual conversion of the data of 4 byte and the data of 8 byte is executed in the data buffer 24. In case that the read demand for the address of the data buffer 24 comes when the data is still remained in the data buffer 24 and is not written in the main memory device, the data is controlled to be forcibly written in the main memory device. Thus, the speed of the data transfer between a CPU and the main memory device can be accelerated.