JP2953407B

A DRAM having a capacitor with a hemispherical silicon grain (HSG) type lower electrode is provided with a monitor element to accurately evaluate the capacitive dielectric film, and to evaluate the increment of the surface area of the lower electrode due to its roughened structure. The surface of th...

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Hauptverfasser:	OKAMURA KENJI, HIROTA TOSHUKI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	OKAMURA KENJI HIROTA TOSHUKI
description	A DRAM having a capacitor with a hemispherical silicon grain (HSG) type lower electrode is provided with a monitor element to accurately evaluate the capacitive dielectric film, and to evaluate the increment of the surface area of the lower electrode due to its roughened structure. The surface of the lower electrode of the capacitor is formed in a roughened structure in a memory section of a semiconductor chip while a capacitor having a lower electrode with a smooth shape is formed on a monitor element section of the semiconductor chip.
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The surface of the lower electrode of the capacitor is formed in a roughened structure in a memory section of a semiconductor chip while a capacitor having a lower electrode with a smooth shape is formed on a monitor element section of the semiconductor chip.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1999</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZODyCjCyNDU2MTB34mFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8QgNTkbGxKgBACdfG3M</recordid><startdate>19990927</startdate><enddate>19990927</enddate><creator>OKAMURA KENJI</creator><creator>HIROTA TOSHUKI</creator><scope>EVB</scope></search><sort><creationdate>19990927</creationdate><title>JP2953407B</title><author>OKAMURA KENJI ; HIROTA TOSHUKI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2953407BB23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1999</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>OKAMURA KENJI</creatorcontrib><creatorcontrib>HIROTA TOSHUKI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OKAMURA KENJI</au><au>HIROTA TOSHUKI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>JP2953407B</title><date>1999-09-27</date><risdate>1999</risdate><abstract>A DRAM having a capacitor with a hemispherical silicon grain (HSG) type lower electrode is provided with a monitor element to accurately evaluate the capacitive dielectric film, and to evaluate the increment of the surface area of the lower electrode due to its roughened structure. The surface of the lower electrode of the capacitor is formed in a roughened structure in a memory section of a semiconductor chip while a capacitor having a lower electrode with a smooth shape is formed on a monitor element section of the semiconductor chip.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
title	JP2953407B
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