JP2884808B

PURPOSE:To turn off a power source, which is turned on first, last and to turn off a power source, which is turned on last, first by providing two gates, counter for up-down counting and four D flip-flops (D-FF). CONSTITUTION:The control circuit is provided with first and second gates 1A and 1B to input a clock signal 13, a counter 2 to respectively count up-down the outputs of the gates 1A and 1B, a decode circuit 3 to input the output of the counter 2, a first D-FF 4A to input the first output of the decode circuit 3, a second D-FF 4B to take the output of the D-FF 4A as an R input and to take an OFF signal 12 as a CK input, a third D-FF 4C to input the last output of the decode circuit 3 and a fourth D-FF 4D to take the output of the D-FF 4C as an R input and to take an ON signal 11 as a CK input. Then, the outputs of the D-FF 4B and 4D are taken as the inputs of the gates 1B and 1A, and the power source is turned off while being delayed only for the clock signal 13 from the decode circuit 3.