JP2753254B

In a packet exchange system for performing packet exchange by setting logical channels, individual input packets are assigned with information idicative of input sequence (IS) of the individual input packets counted in each call and the input sequence information is stored. Each time each packet is...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: GOHARA SHINOBU, OZAKI NAOHIKO, OOTSUKI KANEICHI, ENDO NOBORU, KUWABARA HIROSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:In a packet exchange system for performing packet exchange by setting logical channels, individual input packets are assigned with information idicative of input sequence (IS) of the individual input packets counted in each call and the input sequence information is stored. Each time each packet is delivered, the input sequence information assigned to an input packet is stored as an output sequence information (OS) in a call to which the dilivered packet bleongs, and the status of packets of the call which are present in the exchange is decided on the basis of the stored input sequence information and output sequence information. This system further comprises a rerouting circuit (120) having buffer function and control means (3) for changing the contents of a conversion table (21) when it detects by looking up the conversion table that the number of packets remaining in the exchange which are destined for a specified output line exceeds a predetermined threshold, whereby input packets scheduled to be destined for the specified output line are temporarily stored in the rerouting circuit.