JP2646713B

PURPOSE:To prevent the malfunction of a device caused by the delay difference of LSIs before packaging by setting such a high frequency that the delay difference between respective semiconductor elements occurs as a clock signal for a latch circuit and comparing the delay of LSI signal. CONSTITUTION:A random code generator 1 generates a proper pattern and inputs it in the 1st and 2nd LSIs 2 and 3 and an output signal 8 from the LSI 2 and an output signal 9 from the LSI 3 are inputted in a D type FF group 4. A clock selection circuit 7 selects the clock signal 10 having high frequency equal to the maximum delay out of the clock signals generated by a timing generator 6. Then, signals 11 and 12 obtained by latching the signals 8 and 9 are compared with the aid of signal 10. When the delay difference exceeds an allowable range, next or preceding data is latched, so that NOGO is decided according to an output signal 13 from a comparator 5.