JP2553286B

PURPOSE:To quickly and surely avoid the asynchronous interference by giving specific phase transition to the falling bit pulse of the burst frame of a transmission information signal and receiving and demodulating it and activating the control of asynchronous interference immediately at the time of...

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Bibliographische Detailangaben
1. Verfasser: TANAKA KYOSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To quickly and surely avoid the asynchronous interference by giving specific phase transition to the falling bit pulse of the burst frame of a transmission information signal and receiving and demodulating it and activating the control of asynchronous interference immediately at the time of detecting an error. CONSTITUTION:A signal synthesizing circuit 1 adds falling ramp bits to which phase transition of a specific pattern is given, to the input information signal along with various codes to synthesize the burst frame. This synthesized signal is modulated and controlled in amplitude by modulating and amplitude control circuits 2 and 3 and is transmitted, and it is received and demodulated by a demodulating circuit 6, and a reception processing circuit 8 performs processings such as synchronism detection and error detection of the reception frame. Simultaneously, separating and comparing discrimination circuits 7 and 9 discriminate whether the specific pattern of ramp bits has a transmission error or not; and if it has an error, a control circuit 10 is made to activate a prescribed interference avoiding operation. Thus, the asynchronous interference is quickly and surely avoided.