CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

To provide a circuit board having low risk of warpage of a package substrate generated during manufacturing processes of a package circuit or after completion, and a method of manufacturing the circuit board.SOLUTION: A circuit board of the present invention comprises: a substrate part that comprise...

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Bibliographische Detailangaben
Hauptverfasser: KO CHAN HOON, LEE CHULMIN, KIM SANGHOON, OH INHWAN, BAE SOHYUN, LIM KYOUNGHEE
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a circuit board having low risk of warpage of a package substrate generated during manufacturing processes of a package circuit or after completion, and a method of manufacturing the circuit board.SOLUTION: A circuit board of the present invention comprises: a substrate part that comprises a first insulation layer and a first wiring layer embedded in the first insulation layer and includes a first device-mounting part and a second device-mounting part located on the top surface; a first protective layer located over the substrate part; and an auxiliary layer that is located to at least partially overlap a boundary region including a region between the first device-mounting part and the second device-mounting part and that has higher strength than the first protective layer.SELECTED DRAWING: Figure 1 【課題】パッケージ回路の製造過程又は完成したパッケージ基板で発生する反り(warpage)のリスクを改善する回路基板及びその製造方法を提供する。【解決手段】本発明の回路基板は、第1絶縁層及び第1絶縁層によって埋め込まれた第1配線層を含み、上面に第1素子実装部及び第2素子実装部が位置する基板部と、基板部上に位置する第1保護層と、第1素子実装部と第2素子実装部との間の領域を含む境界領域に少なくとも一部が重畳するように位置して第1保護層よりも強度が高い補助層と、を備える。【選択図】図1