WIRING BOARD

To provide a technique for incorporating an electronic component having electrodes on both upper and lower surfaces in a wiring board and connecting each electrode to a circuit of the wiring board.SOLUTION: A wiring board in the present disclosure includes: a first insulating layer; a first conducti...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TAIZO TOMOYA, KURODA NOBUHISA
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a technique for incorporating an electronic component having electrodes on both upper and lower surfaces in a wiring board and connecting each electrode to a circuit of the wiring board.SOLUTION: A wiring board in the present disclosure includes: a first insulating layer; a first conductive layer covering partially an upper surface of the first insulating layer; a second insulating layer stacked on the first insulating layer with the first conductive layer therebetween; a cavity penetrating the second insulating layer and exposing the first conductive layer; an electronic component accommodated in the cavity and having a first electrode on an upper surface and a second electrode on a lower surface; a third insulating layer stacked on the second insulating layer and filling the cavity; a via conductor penetrating the third insulating layer and connected to the first electrode; and a pad included in the first conductive layer and connected to the second electrode in the cavity. Between the second electrode and the pad, a conductive connection part other than the via conductor for electrically connecting therebetween is included.SELECTED DRAWING: Figure 1 【課題】上下の両面に電極を有する電子部品を配線基板に内蔵し、各電極に配線基板の回路を接続するための技術を開示する。【解決手段】本開示の配線基板は、第1絶縁層と、前記第1絶縁層の上面を部分的に覆う第1導電層と、前記第1導電層を挟んで前記第1絶縁層上に積層される第2絶縁層と、前記第2絶縁層を貫通し、前記第1導電層を露出するキャビティと、前記キャビティに収容されると共に、上面に第1電極を有しかつ下面に第2電極を有する電子部品と、前記第2絶縁層上に積層され、前記キャビティを埋める第3絶縁層と、前記第3絶縁層を貫通し、前記第1電極に接続されると共にビア導体と、前記第1導電層に含まれ、前記キャビティ内で前記第2電極に接続されるパッドと、を有する配線基板であって、前記第2電極と前記パッドとの間には、それらの間を導通接続するビア導体以外の導電性の接続部が含まれる。【選択図】図1