MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

To effectively mitigate warpage generated in an SiC substrate.SOLUTION: A manufacturing method of a semiconductor device comprises: a first ion implantation process that performs ion implantation of a dopant into a first surface of a SiC substrate; and a second ion implantation process that performs...

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1. Verfasser: OTSUBO HIROAKI
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To effectively mitigate warpage generated in an SiC substrate.SOLUTION: A manufacturing method of a semiconductor device comprises: a first ion implantation process that performs ion implantation of a dopant into a first surface of a SiC substrate; and a second ion implantation process that performs ion implantation of a chemical element into a second surface which is positioned at an opposite side of the first surface of the SiC substrate in higher density than 1×1019 cm-3 after the first ion implantation process. In the first ion implantation process, warpage is generated in the SiC substrate in a direction in which the first surface is protruding. In the second ion implantation process, the warpage of the SiC substrate is mitigated.SELECTED DRAWING: Figure 8 【課題】 SiC基板に生じた反りを効果的に緩和する。【解決手段】 半導体装置の製造方法であって、SiC基板の第1表面にドーパントをイオン注入する第1イオン注入工程と、前記第1イオン注入工程よりも後に、前記SiC基板の前記第1表面の反対側に位置する第2表面に、1×1019cm-3よりも高い濃度で元素をイオン注入する第2イオン注入工程、を有する。前記第1イオン注入工程では、前記第1表面が凸となる向きで前記SiC基板に反りが生じる。前記第2イオン注入工程では、前記SiC基板の前記反りが緩和される。【選択図】図8