SEMICONDUCTOR DEVICE

To provide a semiconductor device capable of suitably forming a wiring layer on a memory cell array and a via plug.SOLUTION: According to one embodiment, a semiconductor device comprises a substrate, a first laminated film provided above the substrate, including a plurality of electrode layers and a...

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1. Verfasser: ISHIHARA HANAE
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a semiconductor device capable of suitably forming a wiring layer on a memory cell array and a via plug.SOLUTION: According to one embodiment, a semiconductor device comprises a substrate, a first laminated film provided above the substrate, including a plurality of electrode layers and a plurality of first insulation films alternately laminated in a first direction, and included in a memory cell array, and a second laminated film provided above the substrate and including one or more first insulation films among the plurality of first insulation films and one or more first films alternately laminated with the one or more first insulation films in the first direction. The semiconductor device further includes a first plug provided in the second laminated film, and a first wiring layer provided on the memory cell array and the first plug and electrically connected to the memory cell array and the first plug.SELECTED DRAWING: Figure 5 【課題】メモリセルアレイおよびビアプラグ上に配線層を好適に形成することが可能な半導体装置を提供する。【解決手段】一の実施形態によれば、半導体装置は、基板と、前記基板の上方に設けられ、第1方向に交互に積層された複数の電極層と複数の第1絶縁膜とを含み、メモリセルアレイに含まれる第1積層膜と、前記基板の上方に設けられ、前記複数の第1絶縁膜のうちの1つ以上の第1絶縁膜と、前記1つ以上の第1絶縁膜と前記第1方向に交互に積層された1つ以上の第1膜とを含む第2積層膜とを備える。前記装置はさらに、前記第2積層膜内に設けられた第1プラグと、前記メモリセルアレイおよび前記第1プラグ上に設けられ、前記メモリセルアレイおよび前記第1プラグに電気的に接続された第1配線層とを備える。【選択図】図5