SEMICONDUCTOR DEVICE HAVING THROUGH-VIA

To provide a semiconductor device in which resistance between a through-via and a via connection pad connected to the through-via is reduced.SOLUTION: A semiconductor device comprises: a semiconductor substrate; an integrated circuit layer formed on the semiconductor substrate; a first to an n-th me...

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Bibliographische Detailangaben
Hauptverfasser: KIM SUN OO, OH JAE-HEE, AHN JEONG-HOON, DING SHAOFENG
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a semiconductor device in which resistance between a through-via and a via connection pad connected to the through-via is reduced.SOLUTION: A semiconductor device comprises: a semiconductor substrate; an integrated circuit layer formed on the semiconductor substrate; a first to an n-th metal wiring layers (n is a positive integer, same hereinafter) sequentially formed on the semiconductor substrate and the integrated circuit layer; a plurality of wiring vias connecting the first to n-th metal wiring layers; and a through-via extending in a vertical direction from a via connection pad of any one of the first to n-th metal wiring layers toward the semiconductor substrate and penetrating the semiconductor substrate. The via connection pad is a capping type via connection pad formed on an entire upper surface of the through-via.SELECTED DRAWING: Figure 1 【課題】貫通ビアと貫通ビアに連結されたビア連結パッドとの間の抵抗を減らす半導体装置を提供する。【解決手段】本発明の半導体装置は、半導体基板と、半導体基板上に形成された集積回路層と、半導体基板及び集積回路層の上部に順次に形成された第1~第n金属配線層(nは、正の整数、以下同じ)と、第1~第n金属配線層を連結する複数個の配線ビアと、第1~第n金属配線層のうちのいずれか1つのビア連結パッドから半導体基板に向かって垂直方向に延びると共に半導体基板を貫通する貫通ビアと、を備え、ビア連結パッドは、貫通ビアの上面に全体として形成されたキャッピング型のビア連結パッドである。【選択図】図1