THREE-LAYER STACK TYPE IMAGE SENSOR AND MANUFACTURING METHOD OF THE SAME

To prevent a coupling noise between adjacent pads by miniaturizing misalignment to between a penetration electrode and a pad.SOLUTION: A three-layer stack type image sensor 1000 comprises: a first chip which includes many pixels, a first wiring layer 150 arranged at a lower part of the pixel, and in which each pixel includes a photo diode 110, a transmission gate 120, and an FD region 130; a second chip which corresponds to each pixel and includes a source follower gate 220, a selection gate 240, and a reset gate 230, and in which a second substrate 210 is arranged on the upper part and a second wiring layer 250 is arranged at a lower part; and a third chip which comprises an image sensor processor, and in which a third wiring layer 330 is arranged on the upper part and the third substrate is arranged at the lower part, which are arranged from an upper part in order. A first pad 156 in which the second substrate is penetrated and extended from the second wiring layer, and which is arranged on a penetration electrode 260 having a cross section of a part of the upper part in a reverse trapezoid structure and an upper pad 265 are couped, and the second pad 256 and a third pad 336 are coupled.SELECTED DRAWING: Figure 1C 【課題】貫通電極とパッドとの間にミスアラインを最小化させ、隣接するパッド間のカップリングノイズを防止する。【解決手段】３層積層型イメージセンサ１０００は、上部から順に配され、多数のピクセルを有し、ピクセル下部に、第１配線層１５０を配し、各ピクセルが、フォトダイオード１１０、伝送ゲート１２０及びＦＤ領域１３０を有する第１チップと、各ピクセルに対応し、ソースフォロワゲート２２０、選択ゲート２４０及びリセットゲート２３０を有し、上部に第２基板２１０を配し、下部に第２配線層２５０を配する第２チップと、イメージセンサプロセッサを具備し、上部に第３配線層３３０を配し、下部に第３基板を配する第３チップと、を含み、第２配線層から第２基板を貫通して延在し、上部部分の断面が逆台形構造を有する貫通電極２６０上に配される第１パッド１５６と上部パッド２６５が結合し、第２パッド２５６と第３パッド３３６が結合する。【選択図】図１Ｃ