CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF
To provide a ceramic electronic component and a manufacturing method thereof that can suppress oxidation of the surface of an external electrode.SOLUTION: A ceramic electronic component includes a laminated chip in which a plurality of dielectric layers and a plurality of internal electrode layers a...
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Zusammenfassung: | To provide a ceramic electronic component and a manufacturing method thereof that can suppress oxidation of the surface of an external electrode.SOLUTION: A ceramic electronic component includes a laminated chip in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately laminated, and that has a substantially rectangular parallelepiped shape, and is formed such that the plurality of internal electrode layers are alternately exposed on opposing first and second end surfaces of the substantially rectangular parallelepiped shape, an external electrode provided on the first end surface and the second end surface, and a plating layer provided on the external electrode, and the external electrode includes a base metal layer provided on the layered chip side and containing a base metal as a main component and having an oxidation-reduction potential of less than 0.9 V, and a noble metal layer that is provided closer to the plating layer than the base metal layer and has a noble metal of 90 at% or more and a thickness of 1 μm or less and has an oxidation-reduction potential of 0.9 V or more.SELECTED DRAWING: Figure 4
【課題】 外部電極の表面の酸化を抑制することができるセラミック電子部品およびその製造方法を提供する。【解決手段】 セラミック電子部品は、複数の誘電体層と、複数の内部電極層とが交互に積層され、略直方体形状を有し、前記略直方体形状の対向する第1端面と第2端面とに前記複数の内部電極層が交互に露出するように形成された積層チップと、前記第1端面および前記第2端面に設けられた外部電極と、前記外部電極上に設けられためっき層と、を備え、前記外部電極は、前記積層チップ側に設けられ酸化還元電位が0.9V未満の卑金属を主成分とする卑金属層と、前記卑金属層よりも前記めっき層側に設けられ酸化還元電位が0.9V以上の貴金属が90at%以上で厚みが1μm以下の貴金属層と、を備える。【選択図】 図4 |
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