DEBUGGING DEVICE AND DEBUGGING PROGRAM
To provide a debugging device and a debugging program that can properly, simply, and quickly perform NAND fatigue diagnosis.SOLUTION: A debugging device that debugs an FIL (flash interface layer) for controlling a NAND flash memory, comprises: adjustment dump creation means 51 that creates an adjust...
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Format: | Patent |
Sprache: | eng ; jpn |
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Zusammenfassung: | To provide a debugging device and a debugging program that can properly, simply, and quickly perform NAND fatigue diagnosis.SOLUTION: A debugging device that debugs an FIL (flash interface layer) for controlling a NAND flash memory, comprises: adjustment dump creation means 51 that creates an adjustment dump file; error location identification means 52 that identifies, on the basis of the adjustment dump file, an error location; fatigue data creation means 53 that creates, on the basis of the error location, NAND fatigue data; error parameter identification means 56; current voltage conversion means 54; and fatigue diagnosis display execution means 55 that creates fatigue diagnosis display data where the fatigue data and a current threshold voltage are combined into one image, and displays the data on a display device.SELECTED DRAWING: Figure 5
【課題】適切に簡易に迅速にNAND疲弊診断を行うことができる。【解決手段】NANDフラッシュメモリに対して制御を行うFIL(フラッシュ・インタフェース・レイヤ)のデバッグを行うデバッグ装置において、調整ダンプファイルを作成する調整ダンプ作成手段51と、前記調整ダンプファイルに基づきエラー箇所を特定するエラー箇所特定手段52と、前記エラー箇所に基づきNAND疲弊データを作成する疲弊データ作成手段53と、エラーパラメータ特定手段56と、現状電圧変換手段54と、前記疲弊データと前記現状閾値電圧を1画像にまとめた疲弊診断用表示データを作成し、表示器に表示する疲弊診断用表示実行手段55とを具備する。【選択図】図5 |
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