SEMICONDUCTOR ELEMENT

To provide a semiconductor element including a field effect transistor in which the occurrence of defects is reduced.SOLUTION: A semiconductor element includes a substrate including first and second regions, a first active pin formed on the substrate in the first region and extending in a first direction, a second active pin formed on the substrate in the second region and extending in the first direction, an element separation pattern formed on the substrate between the first region and the second region, a first gate structure extending in a second direction, which is perpendicular to the first direction, across the first active pin on the first active pin and extending to an upper surface of the element separation pattern, and a second gate structure extending in the second direction across the second active pin on the second active pin and extending to the upper surface of the element separation pattern. The first gate structure includes a first part with a first width and a second part with a second width narrower than the first width. The second gate structure includes a third part with the first width and a fourth part with the second width.SELECTED DRAWING: Figure 1 【課題】不良の発生が減少する電界効果トランジスタを含む半導体素子を提供する。【解決手段】第１及び第２の領域を有する基板と、第１の領域の基板上に形成され第１の方向に延在する第１のアクティブピンと、第２の領域の基板上に形成され第１の方向に延在する第２のアクティブピンと、第１の領域と第２の領域との間の基板上に形成される素子分離パターンと、第１のアクティブピン上に第１のアクティブピンを横切って第１の方向と垂直である第２の方向に延在し素子分離パターンの上面まで延在する第１のゲート構造物と、第２のアクティブピン上に第２のアクティブピンを横切って第２の方向に延在し素子分離パターンの上面まで延在する第２のゲート構造物とを有し、第１のゲート構造物は、第１の幅を有する第１の部分と第１の幅よりも狭い第２の幅を有する第２の部分とを含み、第２のゲート構造物は、第１の幅を有する第３の部分と第２の幅を有する第４の部分とを含む。【選択図】図１