SEMICONDUCTOR DEVICE, AND, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
To suppress an increase of a saturation current.SOLUTION: A semiconductor device comprises: a first trench which is provided while extending from a top face of a first impurity layer into a first semiconductor layer; a second trench which is provided while extending from a top face of a second impur...
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Format: | Patent |
Sprache: | eng ; jpn |
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Zusammenfassung: | To suppress an increase of a saturation current.SOLUTION: A semiconductor device comprises: a first trench which is provided while extending from a top face of a first impurity layer into a first semiconductor layer; a second trench which is provided while extending from a top face of a second impurity layer to lower than a bottom face of the first semiconductor layer; a second semiconductor layer of a first conductivity type which is provided in a surface layer of the first impurity layer and disposed while being held between the first trench and a third impurity layer in a planar view; and a third semiconductor layer of the first conductivity type which is provided in a surface layer of the second impurity layer and disposed while being held between the second trench and the third impurity layer in the planar view.SELECTED DRAWING: Figure 1
【課題】飽和電流の増加を抑制する。【解決手段】半導体装置は、第1の不純物層の上面から第1の半導体層内に達して設けられる第1のトレンチと、第2の不純物層の上面から第1の半導体層の下面よりも下方に達して設けられる第2のトレンチと、第1の不純物層の表層に設けられ、平面視で第1のトレンチと第3の不純物層とに挟まれて配置される、第1の導電型の第2の半導体層と、第2の不純物層の表層に設けられ、平面視で第2のトレンチと第3の不純物層とに挟まれて配置される、第1の導電型の第3の半導体層とを備える。【選択図】図1 |
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