SEMICONDUCTOR DEVICE AND TEST METHOD FOR SEMICONDUCTOR DEVICE

To provide a semiconductor device capable of shortening the time for testing whether the connection between semiconductor chips is good.SOLUTION: A semiconductor device includes a first semiconductor chip including a first internal circuit, a plurality of first flip-flop circuits connected to the first internal circuit, a plurality of first selectors, and a plurality of first electrodes connected to the outputs of the first selectors, a plurality of first connection conductors, and a second semiconductor chip including a plurality of second electrodes connected to the first electrodes through the first connection conductors and a second internal circuit connected to at least one of the second electrodes. At least one of the first semiconductor chip and the second semiconductor chip includes a test circuit. The test circuit includes a first detection circuit that receives a signal from each of the second electrodes, a first selector control circuit that controls selection of the first selector, and an expectation value generation circuit. Each first selector includes a signal input that receives a signal from one of the first flip-flop circuits and an expectation value input that receives an expectation value signal from the expectation value generation circuit.SELECTED DRAWING: Figure 1 【課題】半導体チップ間の接続の良否の検証の時間を短縮可能な半導体装置を提供する。【解決手段】半導体装置は、第１内部回路、第１内部回路に接続された複数の第１フリップフロップ回路、複数の第１セレクタ、及び第１セレクタの出力に接続された複数の第１電極を備える第１半導体チップと、複数の第１接続導体と、第１接続導体を介して第１電極に接続された複数の第２電極及び第２電極の少なくとも1つに接続された第２内部回路を備える第２半導体チップを備え、第１半導体チップ及び第２半導体チップの少なくとも一方はテスト回路を備え、テスト回路は、第２電極からのそれぞれの信号を受ける第１検知回路、第１セレクタの選択を制御する第１セレクタ制御回路、及び期待値生成回路を含み、第１セレクタの各々は、第１フリップフロップ回路のいずれか1つからの信号を受ける信号入力と、期待値生成回路からの期待値信号を受ける期待値入力を有する。【選択図】図１