AMPLIFIER CIRCUIT AND COMMUNICATION DEVICE

To provide an amplifier circuit in which the distortion of output characteristics of high-frequency signals is suppressed.SOLUTION: An amplifier circuit 1 includes an amplifying transistor 11 connected to a signal input terminal 110, a power supply circuit 22 configured to supply a bias voltage vg1a...

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Bibliographische Detailangaben
Hauptverfasser: SUGIMOTO YASUTAKA, NASU KOJI
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide an amplifier circuit in which the distortion of output characteristics of high-frequency signals is suppressed.SOLUTION: An amplifier circuit 1 includes an amplifying transistor 11 connected to a signal input terminal 110, a power supply circuit 22 configured to supply a bias voltage vg1a to the amplifying transistor 11, a resistor 32 arranged in series in a bias path connecting the power supply circuit 22 and the amplifying transistor 11, a transistor 21, which is connected to the bias path and power supply circuit 22 and used to simulate the amplifying transistor 11, and a detection diode 31 connected to a bias path between the resistor 32 and the gate of the amplifying transistor 11 and the signal input terminal 110.SELECTED DRAWING: Figure 1 【課題】高周波信号の出力特性の歪みが抑制された増幅回路を提供する。【解決手段】増幅回路1は、信号入力端子110に接続された増幅トランジスタ11と、増幅トランジスタ11にバイアス電圧vg1aを供給するよう構成された電源回路22と、電源回路22および増幅トランジスタ11を結ぶバイアス経路に直列配置された抵抗32と、上記バイアス経路および電源回路22に接続された、増幅トランジスタ11の模擬用であるトランジスタ21と、抵抗32および増幅トランジスタ11のゲートの間のバイアス経路、ならびに信号入力端子110に接続された検波ダイオード31と、を備える。【選択図】図1