DISPLAY DEVICE

To achieve high definition and minimize luminance unevenness.SOLUTION: Each of a first drive circuit, a second drive circuit, and a third drive circuit of a display device includes a write transistor, a drive transistor, a first transistor, and a second transistor. A source region or drain region of the first transistor is connected to an anode electrode of a corresponding light emitting element out of a first light emitting element, a second light emitting element, and a third light emitting element. The second transistor is connected between a feeder line and the anode electrode. The second drive circuit is interposed between the first drive circuit and third drive circuit. The second drive circuit adjoins the first drive circuit and third drive circuit. For the first drive circuit, second drive circuit, and third drive circuit, only one well tap is provided through which a voltage is applied to a well region of a semiconductor substrate. The well tap is interposed between a gate electrode of the drive transistor of the first drive circuit and a gate electrode of the drive transistor of the third drive circuit.SELECTED DRAWING: Figure 7 【課題】高精細化を図りつつ輝度ムラを低減する。【解決手段】表示装置の第１駆動回路、第２駆動回路及び第３駆動回路の各々は、書込みトランジスタ、駆動トランジスタ、第１トランジスタ及び第２トランジスタを有し、第１トランジスタのソース領域又はドレイン領域は、第１発光素子、第２発光素子及び第３発光素子のうちの対応する発光素子のアノード電極に接続され、第２トランジスタは、給電線とアノード電極との間に接続され、第２駆動回路は、第１駆動回路と第３駆動回路との間に配置され、第２駆動回路は、第１駆動回路及び第３駆動回路と隣接し、第１駆動回路、第２駆動回路及び第３駆動回路に対して、半導体基板のウェル領域に電圧を供給するウェルタップが１つだけ設けられ、ウェルタップは、第１駆動回路の駆動トランジスタのゲート電極と第３駆動回路の駆動トランジスタのゲート電極との間に配置される。【選択図】図７