IMAGING DEVICE AND IMAGING APPARATUS

To improve circuit layout efficiency in a logic chip of an imaging device in which pixel chips and logic chips are alternately laminated, and to effectively utilize duplicated function circuits.SOLUTION: An imaging device comprises a first signal processing circuit, a second signal processing circui...

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Bibliographische Detailangaben
Hauptverfasser: HAYASHI ISAO, ISE MAKOTO
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To improve circuit layout efficiency in a logic chip of an imaging device in which pixel chips and logic chips are alternately laminated, and to effectively utilize duplicated function circuits.SOLUTION: An imaging device comprises a first signal processing circuit, a second signal processing circuit, and wiring. The first signal processing circuit comprises a first ramp signal generation circuit and a first AD conversion circuit. The second signal processing circuit comprises a second ramp signal generation circuit and a second AD conversion circuit. The wiring is used for connecting the first ramp signal generation circuit to the first and second AD conversion circuits and connecting the second ramp signal generation circuit to the first and second AD conversion circuits in such a manner that: the first ramp signal output from the first ramp signal generation circuit is supplied to the first and second AD conversion circuits; and the second ramp signal output from the second ramp signal generation circuit is supplied to the second and first AD conversion circuits.SELECTED DRAWING: Figure 3 【課題】 画素チップとロジックチップが互いに積層された撮像素子のロジックチップ内の回路レイアウト効率を高めるとともに、重複する機能回路を有効に活用する。【解決手段】 第1の信号処理回路が第1のランプ信号発生回路および第1のAD変換回路を備え、第2の信号処理回路が第2のランプ信号発生回路および第2のAD変換回路を備え、前記第1のランプ信号発生回路から出力される第1のランプ信号が前記第1のAD変換回路および前記第2のAD変換回路に供給されるとともに、前記第2のランプ信号発生回路から出力される第2のランプ信号が前記第2のAD変換回路および前記第1のAD変換回路に供給されるように接続された配線を有する。【選択図】 図3