SEMICONDUCTOR STORAGE DEVICE

To provide a semiconductor storage device capable of suppressing a bad connection between structures arranged in different hierarchies.SOLUTION: A semiconductor storage device 1 of an embodiment comprises a first stair part SP which is arranged in a position overlapping a plate-like part LI in a lamination direction in a stair region Sr and in which a plurality of conductive layers WL are processed stepwise along a first direction, and second and third stair parts each of which is arranged on both sides in a second direction of the plate-like part LI in the stair region SR and includes a structure reversed in the second direction with respect to the plate-like part LI and in which the plurality of conductive layers WL are processed stepwise. Each of a plurality of first plugs CH is positioned in a different position in the second direction with respect to the plate-like part LI according to a position in the first direction. Each of a plurality of second plugs CH is arranged in a position in which arrangement of each of the plurality of first plugs CH is reversed in the second direction with respect to the plate-like part LI.SELECTED DRAWING: Figure 3 【課題】異なる階層に配置される構造間の接続不良を抑制すること。【解決手段】実施形態の半導体記憶装置１は、階段領域ＳＲ内における積層方向に板状部ＬＩと重なる位置に配置され、複数の導電層ＷＬが第１の方向に沿って階段状に加工された第１の階段部ＳＰと、階段領域ＳＲ内における板状部ＬＩの第２の方向の両側にそれぞれ配置され、複数の導電層ＷＬが階段状に加工された構造であって、板状部ＬＩに対して互いを第２の方向に反転させた構造を有する第２及び第３の階段部と、を備え、複数の第１のプラグＣＨは、第１の方向の位置に応じて、板状部ＬＩに対して第２の方向の異なる位置にそれぞれ配置され、複数の第２のプラグＣＨは、複数の第１のプラグＣＨのそれぞれの配置を板状部ＬＩに対して第２の方向に反転させた位置にそれぞれ配置される。【選択図】図３