SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

To suppress local polishing in the manufacturing process of semiconductor devices.SOLUTION: A semiconductor device has a base substrate B including a wiring layer, and chips C1, C2, C3, C4, C5, and C6 on the base substrate B, and electrodes and protective film P are provided between the chips C1, C2...

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Bibliographische Detailangaben
Hauptverfasser:	HONGO SATOSHI, UDA TATSUO, TOYODA GEN
Format:	Patent
Sprache:	eng ; jpn
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	To suppress local polishing in the manufacturing process of semiconductor devices.SOLUTION: A semiconductor device has a base substrate B including a wiring layer, and chips C1, C2, C3, C4, C5, and C6 on the base substrate B, and electrodes and protective film P are provided between the chips C1, C2, C3, C4, C5, and C6, and the protective film P is also provided on the sides.SELECTED DRAWING: Figure 1 【課題】半導体装置の製造工程における局所研磨を抑制する。【解決手段】半導体装置であって、配線層を含むベース基板Ｂと、ベース基板Ｂ上に設けられたチップＣ１，Ｃ２，Ｃ３，Ｃ４，Ｃ５，Ｃ６と、を備え、チップＣ１，Ｃ２，Ｃ３，Ｃ４，Ｃ５，Ｃ６間に電極及び保護膜Ｐが設けられ、側面にも保護膜Ｐが設けられている。【選択図】図１