VARIABLE CAPACITANCE ELEMENT UNIT AND MANUFACTURING METHOD FOR THE SAME

To provide a variable capacitance element unit with a high capacitance variable ratio and linearity.SOLUTION: A variable capacitance element unit includes at least one first variable capacitance element and at least one second variable capacitance element with a capacitance variable ratio different from that of the first variable capacitance element, which are formed on the same semiconductor substrate. The semiconductor substrate includes a flat region including a part of a main surface of the semiconductor substrate, and a concave region including a concave part provided on the main surface of the semiconductor substrate. The first variable capacitance element includes, in the flat region, a first semiconductor layer with a first conductivity type formed along the main surface of the semiconductor substrate, and a second semiconductor layer with a second conductivity type formed on the first semiconductor layer. The second variable capacitance element includes, in the concave region, the first semiconductor layer with the first conductivity type formed along a surface in the concave part, and the second semiconductor layer with the second conductivity type formed on the first semiconductor layer.SELECTED DRAWING: Figure 1 【課題】容量可変比及び直線性が高い可変容量素子ユニットを提供する。【解決手段】可変容量素子ユニットは、同一の半導体基板に形成された、少なくとも１つの第１可変容量素子と、第１可変容量素子と容量可変比の異なる少なくとも１つの第２可変容量素子とを備える。前記半導体基板は、前記半導体基板の主面の一部を含む平坦領域と、前記半導体基板の主面に設けられた凹部を含む凹部領域とを有する。前記第１可変容量素子は、前記平坦領域において、前記半導体基板の主面に沿って形成された第１導電型の第１半導体層と、前記第１半導体層上に形成された第２導電型の第２半導体層とを有する。前記第２可変容量素子は、前記凹部領域において、前記凹部内の表面に沿って形成された第１導電型の第１半導体層と、前記第１半導体層上に形成された第２導電型の第２半導体層とを有する。【選択図】図１