SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING SEMICONDUCTOR DEVICE

To provide a technique capable of facilitating control of voltage application in a semiconductor device.SOLUTION: A method for manufacturing a semiconductor device applies a positive gate voltage to one of a first gate electrode and a second gate electrode, and when current flows from a collector el...

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Bibliographische Detailangaben
Hauptverfasser:	FURUKAWA AKIHIKO, NISHI KOICHI, SONEDA SHINYA, FUDA MASANORI
Format:	Patent
Sprache:	eng ; jpn
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	To provide a technique capable of facilitating control of voltage application in a semiconductor device.SOLUTION: A method for manufacturing a semiconductor device applies a positive gate voltage to one of a first gate electrode and a second gate electrode, and when current flows from a collector electrode to an emitter electrode, applies a positive gate electrode to the other of the first gate electrode and the second gate electrode. When a positive gate voltage is applied to one gate electrode and current flows from the emitter electrode to the collector electrode, the method applies a voltage less than or equal to a reference voltage to the other gate electrode.SELECTED DRAWING: Figure 3 【課題】半導体装置における電圧印加の制御を容易化可能な技術を提供することを目的とする。【解決手段】半導体装置は、第１ゲート電極及び第２ゲート電極のうちの一方のゲート電極に正のゲート電圧を印加し、かつ、コレクタ電極からエミッタ電極に電流が流れる場合には、第１ゲート電極及び第２ゲート電極のうちの他方のゲート電極に正のゲート電圧を印加する。一方のゲート電極に正のゲート電圧を印加し、かつ、エミッタ電極からコレクタ電極に電流が流れる場合には、他方のゲート電極に基準電圧以下の電圧を印加する。【選択図】図３