SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING THE SAME
To provide a semiconductor light receiving element and a method of manufacturing the same capable of suppressing increase in dark current.SOLUTION: A semiconductor light receiving element comprises: a first semiconductor layer of a first conductivity type provided on a substrate; a light absorption...
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creator | FURUYA AKIRA |
description | To provide a semiconductor light receiving element and a method of manufacturing the same capable of suppressing increase in dark current.SOLUTION: A semiconductor light receiving element comprises: a first semiconductor layer of a first conductivity type provided on a substrate; a light absorption layer provided on the first semiconductor layer; a second semiconductor layer of the first conductivity type provided on the light absorption layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a first electrode electrically connected with the first semiconductor layer; a second electrode electrically connected with the third semiconductor layer; a third electrode; and an insulating film. The second and third semiconductor layers form a mesa protruded above an upper surface of the second semiconductor layer. The insulating film covers the upper surface of the second semiconductor layer. The third electrode is provided on a surface on the insulating film and on the second semiconductor layer.SELECTED DRAWING: Figure 1B
【課題】暗電流の増加を抑制することが可能な半導体受光素子およびその製造方法を提供する。【解決手段】基板の上に設けられ、第1の導電型を有する第1半導体層と、前記第1半導体層の上に設けられた光吸収層と、前記光吸収層の上に設けられ、前記第1の導電型を有する第2半導体層と、前記第2半導体層の上に設けられ、第2の導電型を有する第3半導体層と、前記第1半導体層と電気的に接続された第1電極と、前記第3半導体層と電気的に接続された第2電極と、第3電極と、絶縁膜と、を具備し、前記第2半導体層および前記第3半導体層は、前記第2半導体層の上面よりも上側に突出するメサを形成し、前記絶縁膜は、前記第2半導体層の上面を覆い、前記第3電極は、前記絶縁膜の表面上であって、前記第2半導体層の上に設けられている半導体受光素子。【選択図】 図1B |
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【課題】暗電流の増加を抑制することが可能な半導体受光素子およびその製造方法を提供する。【解決手段】基板の上に設けられ、第1の導電型を有する第1半導体層と、前記第1半導体層の上に設けられた光吸収層と、前記光吸収層の上に設けられ、前記第1の導電型を有する第2半導体層と、前記第2半導体層の上に設けられ、第2の導電型を有する第3半導体層と、前記第1半導体層と電気的に接続された第1電極と、前記第3半導体層と電気的に接続された第2電極と、第3電極と、絶縁膜と、を具備し、前記第2半導体層および前記第3半導体層は、前記第2半導体層の上面よりも上側に突出するメサを形成し、前記絶縁膜は、前記第2半導体層の上面を覆い、前記第3電極は、前記絶縁膜の表面上であって、前記第2半導体層の上に設けられている半導体受光素子。【選択図】 図1B</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230118&DB=EPODOC&CC=JP&NR=2023006305A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230118&DB=EPODOC&CC=JP&NR=2023006305A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FURUYA AKIRA</creatorcontrib><title>SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING THE SAME</title><description>To provide a semiconductor light receiving element and a method of manufacturing the same capable of suppressing increase in dark current.SOLUTION: A semiconductor light receiving element comprises: a first semiconductor layer of a first conductivity type provided on a substrate; a light absorption layer provided on the first semiconductor layer; a second semiconductor layer of the first conductivity type provided on the light absorption layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a first electrode electrically connected with the first semiconductor layer; a second electrode electrically connected with the third semiconductor layer; a third electrode; and an insulating film. The second and third semiconductor layers form a mesa protruded above an upper surface of the second semiconductor layer. The insulating film covers the upper surface of the second semiconductor layer. The third electrode is provided on a surface on the insulating film and on the second semiconductor layer.SELECTED DRAWING: Figure 1B
【課題】暗電流の増加を抑制することが可能な半導体受光素子およびその製造方法を提供する。【解決手段】基板の上に設けられ、第1の導電型を有する第1半導体層と、前記第1半導体層の上に設けられた光吸収層と、前記光吸収層の上に設けられ、前記第1の導電型を有する第2半導体層と、前記第2半導体層の上に設けられ、第2の導電型を有する第3半導体層と、前記第1半導体層と電気的に接続された第1電極と、前記第3半導体層と電気的に接続された第2電極と、第3電極と、絶縁膜と、を具備し、前記第2半導体層および前記第3半導体層は、前記第2半導体層の上面よりも上側に突出するメサを形成し、前記絶縁膜は、前記第2半導体層の上面を覆い、前記第3電極は、前記絶縁膜の表面上であって、前記第2半導体層の上に設けられている半導体受光素子。【選択図】 図1B</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQANAsDqL-w-GsEBp0P5JLE20SSS-upUicRAv1_xHBD3B6y1uKc0_B6xRN0ZwydL51DJk0-auPLVBHgSLvAKOBQOySgWQhYCwWNZf8TewIegy0Fov7-Jjr5udKbC2xdvs6vYY6T-OtPut7OF0a2Sgpj0oeUP2VPtlqLd0</recordid><startdate>20230118</startdate><enddate>20230118</enddate><creator>FURUYA AKIRA</creator><scope>EVB</scope></search><sort><creationdate>20230118</creationdate><title>SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING THE SAME</title><author>FURUYA AKIRA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2023006305A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FURUYA AKIRA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FURUYA AKIRA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING THE SAME</title><date>2023-01-18</date><risdate>2023</risdate><abstract>To provide a semiconductor light receiving element and a method of manufacturing the same capable of suppressing increase in dark current.SOLUTION: A semiconductor light receiving element comprises: a first semiconductor layer of a first conductivity type provided on a substrate; a light absorption layer provided on the first semiconductor layer; a second semiconductor layer of the first conductivity type provided on the light absorption layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a first electrode electrically connected with the first semiconductor layer; a second electrode electrically connected with the third semiconductor layer; a third electrode; and an insulating film. The second and third semiconductor layers form a mesa protruded above an upper surface of the second semiconductor layer. The insulating film covers the upper surface of the second semiconductor layer. The third electrode is provided on a surface on the insulating film and on the second semiconductor layer.SELECTED DRAWING: Figure 1B
【課題】暗電流の増加を抑制することが可能な半導体受光素子およびその製造方法を提供する。【解決手段】基板の上に設けられ、第1の導電型を有する第1半導体層と、前記第1半導体層の上に設けられた光吸収層と、前記光吸収層の上に設けられ、前記第1の導電型を有する第2半導体層と、前記第2半導体層の上に設けられ、第2の導電型を有する第3半導体層と、前記第1半導体層と電気的に接続された第1電極と、前記第3半導体層と電気的に接続された第2電極と、第3電極と、絶縁膜と、を具備し、前記第2半導体層および前記第3半導体層は、前記第2半導体層の上面よりも上側に突出するメサを形成し、前記絶縁膜は、前記第2半導体層の上面を覆い、前記第3電極は、前記絶縁膜の表面上であって、前記第2半導体層の上に設けられている半導体受光素子。【選択図】 図1B</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND METHOD OF MANUFACTURING THE SAME |
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