SEMICONDUCTOR DEVICE

To provide a semiconductor device capable of reducing leakage current while reducing switching loss.SOLUTION: The semiconductor device includes: an IGBT region 11 having an IGBT element; and an FWD region 12 having an FWD element, which are formed on a common semiconductor substrate 30. A barrier re...

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Hauptverfasser: SUMITOMO MASAKIYO, TAKAHASHI SHIGEKI
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TAKAHASHI SHIGEKI
description To provide a semiconductor device capable of reducing leakage current while reducing switching loss.SOLUTION: The semiconductor device includes: an IGBT region 11 having an IGBT element; and an FWD region 12 having an FWD element, which are formed on a common semiconductor substrate 30. A barrier region 36 and a first base layer 32a has the peak concentration at a predetermined position of the semiconductor substrate 30 in the thickness direction. Defining the peak concentration of the barrier region 36 as y[×1.0×1016/cm3], and the peak concentration of the first base layer 32a as x[×10×1017/cm3], the semiconductor device has the configuration that satisfies y≤1.0429x2-2.4371x+1.48.SELECTED DRAWING: Figure 5 【課題】スイッチング損失を低減しつつ、リーク電流も低減できる半導体装置を提供する。【解決手段】IGBT素子を有するIGBT領域11と、FWD素子を有するFWD領域12とが共通の半導体基板30に形成されている半導体装置において、バリア領域36および第1ベース層32aは、半導体基板30の厚さ方向の所定位置にピーク濃度を有し、バリア領域36のピーク濃度をy[×1.0×1016/cm3]とし、第1ベース層32aのピーク濃度をx[×10×1017/cm3]とすると、y≦1.0429x2-2.4371x+1.48を満たす構成となるようにする。【選択図】図5
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2022181457A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2022181457A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2022181457A3</originalsourceid><addsrcrecordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGRkaGFoYmpuaOxkQpAgC9YB8e</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>SUMITOMO MASAKIYO ; TAKAHASHI SHIGEKI</creator><creatorcontrib>SUMITOMO MASAKIYO ; TAKAHASHI SHIGEKI</creatorcontrib><description>To provide a semiconductor device capable of reducing leakage current while reducing switching loss.SOLUTION: The semiconductor device includes: an IGBT region 11 having an IGBT element; and an FWD region 12 having an FWD element, which are formed on a common semiconductor substrate 30. A barrier region 36 and a first base layer 32a has the peak concentration at a predetermined position of the semiconductor substrate 30 in the thickness direction. Defining the peak concentration of the barrier region 36 as y[×1.0×1016/cm3], and the peak concentration of the first base layer 32a as x[×10×1017/cm3], the semiconductor device has the configuration that satisfies y≤1.0429x2-2.4371x+1.48.SELECTED DRAWING: Figure 5 【課題】スイッチング損失を低減しつつ、リーク電流も低減できる半導体装置を提供する。【解決手段】IGBT素子を有するIGBT領域11と、FWD素子を有するFWD領域12とが共通の半導体基板30に形成されている半導体装置において、バリア領域36および第1ベース層32aは、半導体基板30の厚さ方向の所定位置にピーク濃度を有し、バリア領域36のピーク濃度をy[×1.0×1016/cm3]とし、第1ベース層32aのピーク濃度をx[×10×1017/cm3]とすると、y≦1.0429x2-2.4371x+1.48を満たす構成となるようにする。【選択図】図5</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221208&amp;DB=EPODOC&amp;CC=JP&amp;NR=2022181457A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221208&amp;DB=EPODOC&amp;CC=JP&amp;NR=2022181457A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SUMITOMO MASAKIYO</creatorcontrib><creatorcontrib>TAKAHASHI SHIGEKI</creatorcontrib><title>SEMICONDUCTOR DEVICE</title><description>To provide a semiconductor device capable of reducing leakage current while reducing switching loss.SOLUTION: The semiconductor device includes: an IGBT region 11 having an IGBT element; and an FWD region 12 having an FWD element, which are formed on a common semiconductor substrate 30. A barrier region 36 and a first base layer 32a has the peak concentration at a predetermined position of the semiconductor substrate 30 in the thickness direction. Defining the peak concentration of the barrier region 36 as y[×1.0×1016/cm3], and the peak concentration of the first base layer 32a as x[×10×1017/cm3], the semiconductor device has the configuration that satisfies y≤1.0429x2-2.4371x+1.48.SELECTED DRAWING: Figure 5 【課題】スイッチング損失を低減しつつ、リーク電流も低減できる半導体装置を提供する。【解決手段】IGBT素子を有するIGBT領域11と、FWD素子を有するFWD領域12とが共通の半導体基板30に形成されている半導体装置において、バリア領域36および第1ベース層32aは、半導体基板30の厚さ方向の所定位置にピーク濃度を有し、バリア領域36のピーク濃度をy[×1.0×1016/cm3]とし、第1ベース層32aのピーク濃度をx[×10×1017/cm3]とすると、y≦1.0429x2-2.4371x+1.48を満たす構成となるようにする。【選択図】図5</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGRkaGFoYmpuaOxkQpAgC9YB8e</recordid><startdate>20221208</startdate><enddate>20221208</enddate><creator>SUMITOMO MASAKIYO</creator><creator>TAKAHASHI SHIGEKI</creator><scope>EVB</scope></search><sort><creationdate>20221208</creationdate><title>SEMICONDUCTOR DEVICE</title><author>SUMITOMO MASAKIYO ; TAKAHASHI SHIGEKI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2022181457A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SUMITOMO MASAKIYO</creatorcontrib><creatorcontrib>TAKAHASHI SHIGEKI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUMITOMO MASAKIYO</au><au>TAKAHASHI SHIGEKI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE</title><date>2022-12-08</date><risdate>2022</risdate><abstract>To provide a semiconductor device capable of reducing leakage current while reducing switching loss.SOLUTION: The semiconductor device includes: an IGBT region 11 having an IGBT element; and an FWD region 12 having an FWD element, which are formed on a common semiconductor substrate 30. A barrier region 36 and a first base layer 32a has the peak concentration at a predetermined position of the semiconductor substrate 30 in the thickness direction. Defining the peak concentration of the barrier region 36 as y[×1.0×1016/cm3], and the peak concentration of the first base layer 32a as x[×10×1017/cm3], the semiconductor device has the configuration that satisfies y≤1.0429x2-2.4371x+1.48.SELECTED DRAWING: Figure 5 【課題】スイッチング損失を低減しつつ、リーク電流も低減できる半導体装置を提供する。【解決手段】IGBT素子を有するIGBT領域11と、FWD素子を有するFWD領域12とが共通の半導体基板30に形成されている半導体装置において、バリア領域36および第1ベース層32aは、半導体基板30の厚さ方向の所定位置にピーク濃度を有し、バリア領域36のピーク濃度をy[×1.0×1016/cm3]とし、第1ベース層32aのピーク濃度をx[×10×1017/cm3]とすると、y≦1.0429x2-2.4371x+1.48を満たす構成となるようにする。【選択図】図5</abstract><oa>free_for_read</oa></addata></record>
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ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE
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