SEMICONDUCTOR STORAGE DEVICE
To provide a highly reliable semiconductor storage device.SOLUTION: A semiconductor storage device includes a first area including a memory cell array and a second area including a peripheral circuit. The second area includes a semiconductor substrate. The semiconductor substrate includes a first su...
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creator | KONO MICHIHITO UECHI TADAYOSHI IZUMIDA TAKASHI SHIMANE TAKESHI |
description | To provide a highly reliable semiconductor storage device.SOLUTION: A semiconductor storage device includes a first area including a memory cell array and a second area including a peripheral circuit. The second area includes a semiconductor substrate. The semiconductor substrate includes a first surface, a second surface, a semiconductor region between the first and second surfaces, an n-type semiconductor region provided on the first surface and having higher donor concentration than the semiconductor region, a crushed region provided on the second surface, and a p-type semiconductor region provided between the crushed region and the n-type semiconductor region, which is closer to the second surface than the n-type semiconductor region in the thickness direction of the semiconductor substrate and has higher acceptor concentration than the semiconductor region.SELECTED DRAWING: Figure 1
【課題】高い信頼性を有する半導体記憶装置を提供する。【解決手段】半導体記憶装置は、メモリセルアレイを含む第1の領域と、周辺回路を含む第2の領域と、を具備する。第2の領域は、半導体基板を備える。半導体基板は、第1の表面と、第2の表面と、第1および第2の表面の間の半導体領域と、第1の表面に設けられ、ドナー濃度が半導体領域よりも高いn型半導体領域と、第2の表面に設けられる破砕領域と、破砕領域とn型半導体領域との間に設けられ、半導体基板の厚さ方向においてn型半導体領域よりも第2の表面に近く、アクセプタ濃度が半導体領域よりも高いp型半導体領域と、を含む。【選択図】図1 |
format | Patent |
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【課題】高い信頼性を有する半導体記憶装置を提供する。【解決手段】半導体記憶装置は、メモリセルアレイを含む第1の領域と、周辺回路を含む第2の領域と、を具備する。第2の領域は、半導体基板を備える。半導体基板は、第1の表面と、第2の表面と、第1および第2の表面の間の半導体領域と、第1の表面に設けられ、ドナー濃度が半導体領域よりも高いn型半導体領域と、第2の表面に設けられる破砕領域と、破砕領域とn型半導体領域との間に設けられ、半導体基板の厚さ方向においてn型半導体領域よりも第2の表面に近く、アクセプタ濃度が半導体領域よりも高いp型半導体領域と、を含む。【選択図】図1</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220330&DB=EPODOC&CC=JP&NR=2022049822A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220330&DB=EPODOC&CC=JP&NR=2022049822A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KONO MICHIHITO</creatorcontrib><creatorcontrib>UECHI TADAYOSHI</creatorcontrib><creatorcontrib>IZUMIDA TAKASHI</creatorcontrib><creatorcontrib>SHIMANE TAKESHI</creatorcontrib><title>SEMICONDUCTOR STORAGE DEVICE</title><description>To provide a highly reliable semiconductor storage device.SOLUTION: A semiconductor storage device includes a first area including a memory cell array and a second area including a peripheral circuit. The second area includes a semiconductor substrate. The semiconductor substrate includes a first surface, a second surface, a semiconductor region between the first and second surfaces, an n-type semiconductor region provided on the first surface and having higher donor concentration than the semiconductor region, a crushed region provided on the second surface, and a p-type semiconductor region provided between the crushed region and the n-type semiconductor region, which is closer to the second surface than the n-type semiconductor region in the thickness direction of the semiconductor substrate and has higher acceptor concentration than the semiconductor region.SELECTED DRAWING: Figure 1
【課題】高い信頼性を有する半導体記憶装置を提供する。【解決手段】半導体記憶装置は、メモリセルアレイを含む第1の領域と、周辺回路を含む第2の領域と、を具備する。第2の領域は、半導体基板を備える。半導体基板は、第1の表面と、第2の表面と、第1および第2の表面の間の半導体領域と、第1の表面に設けられ、ドナー濃度が半導体領域よりも高いn型半導体領域と、第2の表面に設けられる破砕領域と、破砕領域とn型半導体領域との間に設けられ、半導体基板の厚さ方向においてn型半導体領域よりも第2の表面に近く、アクセプタ濃度が半導体領域よりも高いp型半導体領域と、を含む。【選択図】図1</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAJdvX1dPb3cwl1DvEPUggGEo7urgourmGezq48DKxpiTnFqbxQmptByc01xNlDN7UgPz61uCAxOTUvtSTeK8DIwMjIwMTSwsjI0ZgoRQDAryFZ</recordid><startdate>20220330</startdate><enddate>20220330</enddate><creator>KONO MICHIHITO</creator><creator>UECHI TADAYOSHI</creator><creator>IZUMIDA TAKASHI</creator><creator>SHIMANE TAKESHI</creator><scope>EVB</scope></search><sort><creationdate>20220330</creationdate><title>SEMICONDUCTOR STORAGE DEVICE</title><author>KONO MICHIHITO ; UECHI TADAYOSHI ; IZUMIDA TAKASHI ; SHIMANE TAKESHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2022049822A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KONO MICHIHITO</creatorcontrib><creatorcontrib>UECHI TADAYOSHI</creatorcontrib><creatorcontrib>IZUMIDA TAKASHI</creatorcontrib><creatorcontrib>SHIMANE TAKESHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KONO MICHIHITO</au><au>UECHI TADAYOSHI</au><au>IZUMIDA TAKASHI</au><au>SHIMANE TAKESHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR STORAGE DEVICE</title><date>2022-03-30</date><risdate>2022</risdate><abstract>To provide a highly reliable semiconductor storage device.SOLUTION: A semiconductor storage device includes a first area including a memory cell array and a second area including a peripheral circuit. The second area includes a semiconductor substrate. The semiconductor substrate includes a first surface, a second surface, a semiconductor region between the first and second surfaces, an n-type semiconductor region provided on the first surface and having higher donor concentration than the semiconductor region, a crushed region provided on the second surface, and a p-type semiconductor region provided between the crushed region and the n-type semiconductor region, which is closer to the second surface than the n-type semiconductor region in the thickness direction of the semiconductor substrate and has higher acceptor concentration than the semiconductor region.SELECTED DRAWING: Figure 1
【課題】高い信頼性を有する半導体記憶装置を提供する。【解決手段】半導体記憶装置は、メモリセルアレイを含む第1の領域と、周辺回路を含む第2の領域と、を具備する。第2の領域は、半導体基板を備える。半導体基板は、第1の表面と、第2の表面と、第1および第2の表面の間の半導体領域と、第1の表面に設けられ、ドナー濃度が半導体領域よりも高いn型半導体領域と、第2の表面に設けられる破砕領域と、破砕領域とn型半導体領域との間に設けられ、半導体基板の厚さ方向においてn型半導体領域よりも第2の表面に近く、アクセプタ濃度が半導体領域よりも高いp型半導体領域と、を含む。【選択図】図1</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR STORAGE DEVICE |
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