SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

To provide a semiconductor device of a fan-out package structure capable of suppressing a short circuit across an extension wiring and a semiconductor element arranged on a semiconductor element.SOLUTION: A part of the surface 11a of a semiconductor element 11 is covered with an encapsulant 12 toget...

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Hauptverfasser: OSAWA SEIGO, OKURA YASUTSUGU
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To provide a semiconductor device of a fan-out package structure capable of suppressing a short circuit across an extension wiring and a semiconductor element arranged on a semiconductor element.SOLUTION: A part of the surface 11a of a semiconductor element 11 is covered with an encapsulant 12 together with the side surface 11c of the semiconductor element 11. One side 12a of the encapsulant 12 covering a surface 11a of the semiconductor element 11 is a flat plane, which is covered by a rewiring layer 15 that has an extension wiring 152 which extends from the inside to the outside of the outer shell of the semiconductor element 11. The insulation is ensured of an isolation layer 151 formed over the flat side 12a of the encapsulant 12 even on the boundary between the side 11c of the semiconductor element 11 and the encapsulant 12 without being influenced thereby.SELECTED DRAWING: Figure 1 【課題】ファンアウトパッケージ構造の半導体装置において半導体素子の上に配置される延設配線と半導体素子との短絡を抑制する。【解決手段】半導体素子11の表面11aの一部は、半導体素子11の側面11cごと封止材12に覆われている。封止材12のうち半導体素子11の表面11aを覆う一面12aは、平坦な面となっており、半導体素子11の外郭の内側から外側まで延設された延設配線152を有する再配線層15により覆われている。封止材12の平坦な一面12a上に形成された絶縁層151は、半導体素子11の側面11cと封止材12との境界上であっても、その影響を受けず、絶縁性が確保される。【選択図】図1