SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME

To provide a semiconductor device including a memory block with suitable capacity with respect to the size of various data to be stored, in any semiconductor chip, and a manufacturing method for the same.SOLUTION: A semiconductor device 100 according to the present invention is formed by electricall...

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Bibliographische Detailangaben
Hauptverfasser: SAKUI KOJI, OBA TAKAYUKI
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a semiconductor device including a memory block with suitable capacity with respect to the size of various data to be stored, in any semiconductor chip, and a manufacturing method for the same.SOLUTION: A semiconductor device 100 according to the present invention is formed by electrically connecting a plurality of semiconductor chips 102 stacked on a substrate 101 through a plurality of penetration electrodes 103 penetrating in a stacking direction L. The semiconductor chips 102 include first semiconductor chips 104 each including one or more memory blocks 106, and second semiconductor chips 105 each including a logic circuit that controls the operation of the memory block 106. The capacity of the memory block 106 in at least one first semiconductor chip 104 is different from that of the memory block 106 in another first semiconductor chip 104. The penetration electrode 103 penetrates an outer peripheral part of each memory block 106.SELECTED DRAWING: Figure 1 【課題】記憶する様々なデータのサイズに対し、適した容量のメモリブロックを、いずれかの半導体チップに有する半導体装置と、その製造方法を提供する。【解決手段】本発明の半導体装置100は、基板101に積層された複数の半導体チップ102を、積層方向Lに貫通する複数の貫通電極103を介して電気的に接続してなる半導体装置であって、複数の半導体チップ102が、単数または複数のメモリブロック106を有する第一半導体チップ104と、メモリブロック106の動作を制御するロジック回路を有する第二半導体チップ105とを含み、少なくとも一つの第一半導体チップ102のメモリブロック106の容量が、他の第一半導体チップ104のメモリブロック106の容量と異なり、貫通電極103が、各々のメモリブロック106の外周部を貫通している。【選択図】図1