PLATING METHOD, SUBSTRATE WITH VIA, AND SILICONE WAFER WITH VIA
To decrease the depth of recesses present on an upper face of a plating film formed in a plurality of vias present on a substrate or on a silicone wafer, and to make the height of tin-based bumps after reflow uniform.SOLUTION: The plating method is used for forming a tin-based plating film in each o...
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Zusammenfassung: | To decrease the depth of recesses present on an upper face of a plating film formed in a plurality of vias present on a substrate or on a silicone wafer, and to make the height of tin-based bumps after reflow uniform.SOLUTION: The plating method is used for forming a tin-based plating film in each of a plurality of vias present on a substrate or on a silicone wafer. A plating solution to be used in the plating method at least contains a soluble salt (A) containing a stannous salt, a compound (B) containing a carbonyl group, a surfactant (C), and an unsaturated carboxylic acid (D). The rate of agitating the plating solution is made higher in the initial stage of plating, and is made lower in the later stage of plating relative to the initial stage of plating. Also, the plating current density is made higher in the initial stage of plating, and is made lower in the later stage of plating relative to the initial stage of plating.SELECTED DRAWING: Figure 1
【課題】基板又はシリコンウエハ上の複数のビア内に形成されためっき皮膜上面のリセスの深さを減少するとともに、リフロー後の錫系バンプの高さを均一にする。【解決手段】基板又はシリコンウエハ上の複数のビアのそれぞれに錫系めっき皮膜を形成するめっき方法である。めっき方法に用いられるめっき液が、少なくとも、第一錫塩を含む可溶性塩(A)と、カルボニル基含有化合物(B)と、界面活性剤(C)と、不飽和カルボン酸(D)とを含み、めっき液の撹拌速度を、めっき初期では高くし、めっき後期ではめっき初期よりも低くし、かつめっきの電流密度を、めっき初期において高くし、めっき後期においてはめっき初期よりも低くする。【選択図】図1 |
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