SERIAL MULTIPLEX INVERTER AND METHOD FOR CONTROLLING SERIAL MULTIPLEX INVERTER

To suppress DC link voltage of a cell from becoming over-voltage in a serial multiplex inverter.SOLUTION: A modulated wave generation part 6 outputs voltage command values of respective phases. A first correction value calculation part 7a outputs a first correction value whose polarity switches when the voltage command value of at least any one phase of the respective phrases is within an inhibition band. In the case that the voltage command values of at least any one of the respective phases to which the first correction value is added is in the zero inhibition band, a second correction value calculation part 7b outputs a second correction value so that the voltage command values of all the phases become outside a zero inhibition band in a positive direction when the first correction value is on a positive pole side, meanwhile, outputs a second correction value so that the voltage command values of all the phases become outside the zero inhibition band in a negative direction when the first correction value is on a negative pole side. Addition parts 10a to 10c add the first correction value and the second correction value to the voltage command values of the respective phases. A carrier modulation part 11 generates gate signals of switching elements of the respective cells on the basis of comparison between outputs of the addition parts 10a to 10c and a carrier signal.SELECTED DRAWING: Figure 2 【課題】直列多重インバータにおいてセルの直流リンク電圧が過電圧となることを抑制する。【解決手段】変調波発生部６は各相の電圧指令値を出力する。第１補正値演算部７ａは各相の電圧指令値のうち少なくとも何れか１つの相が禁止帯内にある場合、極性が切り換わる第１の補正値を出力する。第２補正値演算部７ｂは第１の補正値を加算した各相の電圧指令値のうち少なくとも何れか１つの相が零禁止帯内にある場合、第１の補正値が正極の場合は全ての相の電圧指令値が正方向の零禁止帯外となるような第２の補正値を出力し、第１の補正値が負極の場合は全ての相の電圧指令値が負方向の零禁止帯外となるような第２の補正値を出力する。加算部１０ａ〜１０ｃは第１の補正値と第２の補正値を各相の電圧指令値に加算する。キャリア変調部１１は加算部１０ａ〜１０ｃの出力とキャリア信号との比較に基づいて各セルのスイッチング素子のゲート信号を生成する。【選択図】図２