INFORMATION PROCESSING APPARATUS AND ARITHMETIC PROGRAM
To make speed of task execution higher.SOLUTION: An information processing apparatus 10 according to the present invention has a plurality of cores 12 for executing a plurality of tasks in parallel, a plurality of cache memories 13 provided so as to correspond to the respective cores 12 for storing...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng ; jpn |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | To make speed of task execution higher.SOLUTION: An information processing apparatus 10 according to the present invention has a plurality of cores 12 for executing a plurality of tasks in parallel, a plurality of cache memories 13 provided so as to correspond to the respective cores 12 for storing data that the tasks refer to during the execution, a specifying unit 45 for specifying an overlapped state between data referred to by the executed task during its execution and data to be referred to by an unfinished task during its execution, with respect to each of the cores 12, and an executing unit 46 for executing an unfinished task by the core 12 having the most overlapped data among the plurality of cores 12.SELECTED DRAWING: Figure 10
【課題】タスクの実行速度を高速化すること。【解決手段】複数のタスクの各々を並列実行する複数のコア12と、コア12の各々に対応して設けられ、タスクが実行時に参照するデータを記憶する複数のキャッシュメモリ13と、実行済のタスクが実行時に参照したデータと、未実行のタスクが実行時に参照する予定のデータとの重なりをコア12ごとに特定する特定部45と、複数のコア12のうちで重なりが最も大きいコア12において未実行のタスクを実行する実行部46とを有する情報処理装置10による。【選択図】図10 |
---|