SEMICONDUCTOR STORAGE DEVICE
To provide a technique capable of appropriately ensuring both of rewritable frequency of data and a retention period of data when using a magnetoresistive memory in a semiconductor storage device.SOLUTION: A semiconductor storage device 20 includes a first magnetoresistive memory 21 and a second mag...
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| creator | NARUSE MINENOBU |
| description | To provide a technique capable of appropriately ensuring both of rewritable frequency of data and a retention period of data when using a magnetoresistive memory in a semiconductor storage device.SOLUTION: A semiconductor storage device 20 includes a first magnetoresistive memory 21 and a second magnetoresistive memory 22 of two types of magnetoresistive memories accessed by a target logic part 41 which is one of logic parts 40. The target logic part 41, the first magnetoresistive memory 21 and the second magnetoresistive memory 22 are formed into one semiconductor chip and the first magnetoresistive memory 21 is larger in coercive field strength than the second magnetoresistive memory 22.SELECTED DRAWING: Figure 2
【課題】半導体記憶装置に磁気抵抗メモリを用いる場合に、データの書き換え可能回数とデータの保持期間との双方を適切に確保することが可能な技術を実現する。【解決手段】半導体記憶装置２０は、１つのロジック部４０である対象ロジック部４１によりアクセスされる２種類の磁気抵抗メモリである、第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とを備える。対象ロジック部４１と第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とが１つの半導体チップに形成され、第１磁気抵抗メモリ２１は、第２磁気抵抗メモリ２２よりも保磁力が大きい。【選択図】図２ |
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【課題】半導体記憶装置に磁気抵抗メモリを用いる場合に、データの書き換え可能回数とデータの保持期間との双方を適切に確保することが可能な技術を実現する。【解決手段】半導体記憶装置２０は、１つのロジック部４０である対象ロジック部４１によりアクセスされる２種類の磁気抵抗メモリである、第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とを備える。対象ロジック部４１と第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とが１つの半導体チップに形成され、第１磁気抵抗メモリ２１は、第２磁気抵抗メモリ２２よりも保磁力が大きい。【選択図】図２</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201224&DB=EPODOC&CC=JP&NR=2020205329A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201224&DB=EPODOC&CC=JP&NR=2020205329A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NARUSE MINENOBU</creatorcontrib><title>SEMICONDUCTOR STORAGE DEVICE</title><description>To provide a technique capable of appropriately ensuring both of rewritable frequency of data and a retention period of data when using a magnetoresistive memory in a semiconductor storage device.SOLUTION: A semiconductor storage device 20 includes a first magnetoresistive memory 21 and a second magnetoresistive memory 22 of two types of magnetoresistive memories accessed by a target logic part 41 which is one of logic parts 40. The target logic part 41, the first magnetoresistive memory 21 and the second magnetoresistive memory 22 are formed into one semiconductor chip and the first magnetoresistive memory 21 is larger in coercive field strength than the second magnetoresistive memory 22.SELECTED DRAWING: Figure 2
【課題】半導体記憶装置に磁気抵抗メモリを用いる場合に、データの書き換え可能回数とデータの保持期間との双方を適切に確保することが可能な技術を実現する。【解決手段】半導体記憶装置２０は、１つのロジック部４０である対象ロジック部４１によりアクセスされる２種類の磁気抵抗メモリである、第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とを備える。対象ロジック部４１と第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とが１つの半導体チップに形成され、第１磁気抵抗メモリ２１は、第２磁気抵抗メモリ２２よりも保磁力が大きい。【選択図】図２</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAJdvX1dPb3cwl1DvEPUggGEo7urgourmGezq48DKxpiTnFqbxQmptByc01xNlDN7UgPz61uCAxOTUvtSTeK8DIAARNjY0sHY2JUgQAv10hTQ</recordid><startdate>20201224</startdate><enddate>20201224</enddate><creator>NARUSE MINENOBU</creator><scope>EVB</scope></search><sort><creationdate>20201224</creationdate><title>SEMICONDUCTOR STORAGE DEVICE</title><author>NARUSE MINENOBU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2020205329A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>NARUSE MINENOBU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NARUSE MINENOBU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR STORAGE DEVICE</title><date>2020-12-24</date><risdate>2020</risdate><abstract>To provide a technique capable of appropriately ensuring both of rewritable frequency of data and a retention period of data when using a magnetoresistive memory in a semiconductor storage device.SOLUTION: A semiconductor storage device 20 includes a first magnetoresistive memory 21 and a second magnetoresistive memory 22 of two types of magnetoresistive memories accessed by a target logic part 41 which is one of logic parts 40. The target logic part 41, the first magnetoresistive memory 21 and the second magnetoresistive memory 22 are formed into one semiconductor chip and the first magnetoresistive memory 21 is larger in coercive field strength than the second magnetoresistive memory 22.SELECTED DRAWING: Figure 2
【課題】半導体記憶装置に磁気抵抗メモリを用いる場合に、データの書き換え可能回数とデータの保持期間との双方を適切に確保することが可能な技術を実現する。【解決手段】半導体記憶装置２０は、１つのロジック部４０である対象ロジック部４１によりアクセスされる２種類の磁気抵抗メモリである、第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とを備える。対象ロジック部４１と第１磁気抵抗メモリ２１と第２磁気抵抗メモリ２２とが１つの半導体チップに形成され、第１磁気抵抗メモリ２１は、第２磁気抵抗メモリ２２よりも保磁力が大きい。【選択図】図２</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
| title | SEMICONDUCTOR STORAGE DEVICE |
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