SEMICONDUCTOR INTEGRATED CIRCUIT

To provide a semiconductor integrated circuit capable of improving voltage-withstanding with a simple configuration.SOLUTION: The semiconductor integrated circuit includes: a substrate 12; an embedded insulator film 14 provided on the substrate 12; a p-type impurity region 16 formed on the embedded...

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1. Verfasser: SHIMA KENGO
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To provide a semiconductor integrated circuit capable of improving voltage-withstanding with a simple configuration.SOLUTION: The semiconductor integrated circuit includes: a substrate 12; an embedded insulator film 14 provided on the substrate 12; a p-type impurity region 16 formed on the embedded insulator film 14; and an n-type impurity region 18 formed in the p-type impurity region 16. A potential of the substrate 12 is made into a potential between a potential of the p-type impurity region 16 and a potential of the n-type impurity region 18.SELECTED DRAWING: Figure 2 【課題】簡易な構成で耐圧を向上させることが可能な半導体集積回路を提供すること。【解決手段】基板12と、基板12上に設けられた埋め込み絶縁膜14と、埋め込み絶縁膜14上に形成されたP型不純物領域16と、P型不純物領域16内に形成されたN型不純物領域18と、を含み、基板12の電位が、P型不純物領域16の電位とN型不純物領域18の電位の間の電位とされている。【選択図】図2