POWER CONTROL DEVICE AND SWITCHING POWER SUPPLY

To suppress the influence of followability deterioration of a full-wave rectification waveform at falling, caused by the parasitic capacitance of the first node when the load of a first node becomes small.SOLUTION: A power control device 100 includes: an initiation circuit 130 which, when it is swit...

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Hauptverfasser: INOUE KATSUMI, AOKI KANJI
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To suppress the influence of followability deterioration of a full-wave rectification waveform at falling, caused by the parasitic capacitance of the first node when the load of a first node becomes small.SOLUTION: A power control device 100 includes: an initiation circuit 130 which, when it is switched on, charges a capacitor connected to a second node Vcc with a full-wave rectification voltage input to a first node VH; a first detection circuit 102 which detects whether or not a voltage of the first node VH has become lower than a first voltage; a second detection circuit 104 which detects whether or not a voltage of the second node Vcc has become lower than a second voltage, and whether or not the voltage of the second node Vcc has become higher than or equal to a third voltage which is higher than the second voltage; a discharge circuit 140 which, when it is switched on, discharges an electric charge accumulated in the first node; and a control circuit 110 which switches on the initiation circuit 130 when the voltage of the first node VH becomes lower than the first voltage, and switches on the discharge circuit 140 when the voltage of the second node Vcc becomes lower than the second voltage, whereas switches off the discharge circuit when the voltage of the second node Vcc becomes the third voltage or higher.SELECTED DRAWING: Figure 2 【課題】第1ノードの負荷が小さくなった場合に、当該第1ノードの寄生容量により全波整流の立下がり時波形の追従性悪化の影響を抑える。【解決手段】電源制御装置100は、第1ノードVHに入力された全波整流電圧を第2ノードVccに接続されたコンデンサーにオンで充電させる起動回路130と、第1ノードVHが第1電圧未満となったか否かを検出する第1検出回路102と、第2ノードVccが第2電圧未満となったか否か、および、第2ノードVccが第2電圧よりも高い第3電圧以上となったか否かを検出する第2検出回路104と、第1ノードに蓄積された電荷をオンで放電させる放電回路140と、起動回路130を第1ノードVHの電圧が第1電圧未満となったときにオンさせ、放電回路140を、第2ノードVccが第2電圧未満となったときにオンさせ、第2ノードVccの電圧が第3電圧以上となったときにオフさせる制御回路110と、を含む。【選択図】図2