POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
To provide a power semiconductor device using a lead frame which facilitates mounting on a control board while suppressing deformation and bending of terminals and ensuring insulation between terminals, and to provide a method of manufacturing the same.SOLUTION: By providing a package 1, having a se...
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| creator | ICHIKAWA KEITARO SHIKASHO YUJI KAWAHARA FUMIHITO KANO TAKETOSHI |
| description | To provide a power semiconductor device using a lead frame which facilitates mounting on a control board while suppressing deformation and bending of terminals and ensuring insulation between terminals, and to provide a method of manufacturing the same.SOLUTION: By providing a package 1, having a semiconductor element mounted on a lead frame 2 and a sealed lead frame 2, a terminal 3 exposed and bent from a side of the package 1, and a terminal bending portion 4, which is a bent portion of the terminal 3 and whose width is greater than a tip width of the terminal 3 and equal to or smaller than a width of the terminal 3 in contact with the package 1, the terminal 3 is prevented from being deformed and bent, necessary insulation between adjacent terminals 3 is ensured, and mounting on a control board can be done easily.SELECTED DRAWING: Figure 1
【課題】端子の変形、湾曲を抑制し、端子間の絶縁性を確保するとともに、制御基板への実装性を容易にしたリードフレームを用いた電力半導体装置及びその製造方法を提供する。【解決手段】リードフレーム２上に半導体素子が搭載され、封止されたリードフレーム２を有したパッケージ１と、パッケージ１の側面から露出し、折り曲がっている端子３と、端子３の折り曲がった部分であり、幅は端子３の先端幅より大きく、パッケージ１に接している端子３の幅以下である端子曲げ部４を設けることにより、端子３の変形、湾曲を抑制し、隣り合う端子３の間において、必要な絶縁性を確保し、制御基板への実装を容易に行うことができる。【選択図】図１ |
| format | Patent |
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【課題】端子の変形、湾曲を抑制し、端子間の絶縁性を確保するとともに、制御基板への実装性を容易にしたリードフレームを用いた電力半導体装置及びその製造方法を提供する。【解決手段】リードフレーム２上に半導体素子が搭載され、封止されたリードフレーム２を有したパッケージ１と、パッケージ１の側面から露出し、折り曲がっている端子３と、端子３の折り曲がった部分であり、幅は端子３の先端幅より大きく、パッケージ１に接している端子３の幅以下である端子曲げ部４を設けることにより、端子３の変形、湾曲を抑制し、隣り合う端子３の間において、必要な絶縁性を確保し、制御基板への実装を容易に行うことができる。【選択図】図１</description><language>eng ; jpn</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200924&DB=EPODOC&CC=JP&NR=2020155706A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200924&DB=EPODOC&CC=JP&NR=2020155706A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ICHIKAWA KEITARO</creatorcontrib><creatorcontrib>SHIKASHO YUJI</creatorcontrib><creatorcontrib>KAWAHARA FUMIHITO</creatorcontrib><creatorcontrib>KANO TAKETOSHI</creatorcontrib><title>POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME</title><description>To provide a power semiconductor device using a lead frame which facilitates mounting on a control board while suppressing deformation and bending of terminals and ensuring insulation between terminals, and to provide a method of manufacturing the same.SOLUTION: By providing a package 1, having a semiconductor element mounted on a lead frame 2 and a sealed lead frame 2, a terminal 3 exposed and bent from a side of the package 1, and a terminal bending portion 4, which is a bent portion of the terminal 3 and whose width is greater than a tip width of the terminal 3 and equal to or smaller than a width of the terminal 3 in contact with the package 1, the terminal 3 is prevented from being deformed and bent, necessary insulation between adjacent terminals 3 is ensured, and mounting on a control board can be done easily.SELECTED DRAWING: Figure 1
【課題】端子の変形、湾曲を抑制し、端子間の絶縁性を確保するとともに、制御基板への実装性を容易にしたリードフレームを用いた電力半導体装置及びその製造方法を提供する。【解決手段】リードフレーム２上に半導体素子が搭載され、封止されたリードフレーム２を有したパッケージ１と、パッケージ１の側面から露出し、折り曲がっている端子３と、端子３の折り曲がった部分であり、幅は端子３の先端幅より大きく、パッケージ１に接している端子３の幅以下である端子曲げ部４を設けることにより、端子３の変形、湾曲を抑制し、隣り合う端子３の間において、必要な絶縁性を確保し、制御基板への実装を容易に行うことができる。【選択図】図１</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAP8A93DVIIdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8HX0C3VzdA4JDfL0c1fwdQ3x8HdR8HdTCPFwVQh29HXlYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBkYGhqam5gZmjsZEKQIA0tMqsg</recordid><startdate>20200924</startdate><enddate>20200924</enddate><creator>ICHIKAWA KEITARO</creator><creator>SHIKASHO YUJI</creator><creator>KAWAHARA FUMIHITO</creator><creator>KANO TAKETOSHI</creator><scope>EVB</scope></search><sort><creationdate>20200924</creationdate><title>POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME</title><author>ICHIKAWA KEITARO ; SHIKASHO YUJI ; KAWAHARA FUMIHITO ; KANO TAKETOSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2020155706A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; jpn</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ICHIKAWA KEITARO</creatorcontrib><creatorcontrib>SHIKASHO YUJI</creatorcontrib><creatorcontrib>KAWAHARA FUMIHITO</creatorcontrib><creatorcontrib>KANO TAKETOSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ICHIKAWA KEITARO</au><au>SHIKASHO YUJI</au><au>KAWAHARA FUMIHITO</au><au>KANO TAKETOSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME</title><date>2020-09-24</date><risdate>2020</risdate><abstract>To provide a power semiconductor device using a lead frame which facilitates mounting on a control board while suppressing deformation and bending of terminals and ensuring insulation between terminals, and to provide a method of manufacturing the same.SOLUTION: By providing a package 1, having a semiconductor element mounted on a lead frame 2 and a sealed lead frame 2, a terminal 3 exposed and bent from a side of the package 1, and a terminal bending portion 4, which is a bent portion of the terminal 3 and whose width is greater than a tip width of the terminal 3 and equal to or smaller than a width of the terminal 3 in contact with the package 1, the terminal 3 is prevented from being deformed and bent, necessary insulation between adjacent terminals 3 is ensured, and mounting on a control board can be done easily.SELECTED DRAWING: Figure 1
【課題】端子の変形、湾曲を抑制し、端子間の絶縁性を確保するとともに、制御基板への実装性を容易にしたリードフレームを用いた電力半導体装置及びその製造方法を提供する。【解決手段】リードフレーム２上に半導体素子が搭載され、封止されたリードフレーム２を有したパッケージ１と、パッケージ１の側面から露出し、折り曲がっている端子３と、端子３の折り曲がった部分であり、幅は端子３の先端幅より大きく、パッケージ１に接している端子３の幅以下である端子曲げ部４を設けることにより、端子３の変形、湾曲を抑制し、隣り合う端子３の間において、必要な絶縁性を確保し、制御基板への実装を容易に行うことができる。【選択図】図１</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME |
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