SEMICONDUCTOR DEVICE

To provide a semiconductor device including a p-channel MOS transistor that can suppress junction leakage.SOLUTION: In a semiconductor device, a transistor 10 includes n-type impurity regions 12a and 12b that are disposed away from each other in an n-type silicon semiconductor layer 100, p-type impurity regions 13a and 13b with low concentration that are disposed adjacent to the impurity regions 12a and 12b, respectively, and p-type impurity regions 14a and 14b with high concentration that are disposed adjacent to the impurity regions 13a and 13b, respectively, and are deeper than the impurity regions 13a and 13b. Below the impurity regions 14a and 14b and away from the impurity regions 14a and 14b, p-type impurity regions 15a and 15b with lower impurity concentration than the impurity regions 14a and 14b are provided. Between the impurity layer 14a and the impurity region 15a, a region 16a containing carbon is disposed. Between the impurity region 14b and the impurity region 15b, a region 16b containing carbon is disposed.SELECTED DRAWING: Figure 1 【課題】接合リークを抑制することのできるｐチャネルＭＯＳトランジスタを備えた半導体装置を提供する。【解決手段】半導体装置において、トランジスタ１０は、ｎ型シリコン半導体層１００に離間して配置されたｎ型の不純物領域１２ａ、１２ｂと、不純物領域１２ａ、１２ｂにそれぞれ隣接して配置された低濃度のｐ型の不純物領域１３ａ、１３ｂと、不純物領域１３ａ、１３ｂにそれぞれ隣接して配置され、不純物領域１３ａ、１３ｂよりも深さが深く不純物濃度が高いｐ型の不純物領域１４ａ、１４ｂと、を備える。不純物領域１４ａ、１４ｂのそれぞれの下方に不純物領域１４ａ、１４ｂから離れて配置され、不純物領域１４ａ、１４ｂより不純物濃度が低いｐ型の不純物領域１５ａ、１５ｂが設けられ、不純物層１４ａと不純物領域１５ａとの間に炭素を含む領域１６ａが配置され、不純物領域１４ｂと不純物領域１５ｂとの間に炭素を含む領域１６ｂが配置されている。【選択図】図１