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To examine internal stress of a semiconductor device including a conductive film, which is affected by the internal stress of the conductive film.SOLUTION: A semiconductor device including an n-channel type TFT provided on an insulating surface is configured so that impurity elements are introduced...

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1. Verfasser: ARAO TATSUYA
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To examine internal stress of a semiconductor device including a conductive film, which is affected by the internal stress of the conductive film.SOLUTION: A semiconductor device including an n-channel type TFT provided on an insulating surface is configured so that impurity elements are introduced to a conductive film, for instance, a gate electrode so that a semiconductor film is subjected to pulling stress. The semiconductor device including a p-channel type TFT provided on the insulating surface is configured so that the impurity elements are introduced to the conductive film, for instance, the gate electrode so that the semiconductor film is subjected to compression stress.SELECTED DRAWING: Figure 6 【課題】導電膜を有する半導体装置は、導電膜の内部応力の影響を受ける。内部応力について検討する。【解決手段】絶縁表面上に設けられたnチャネル型TFTを有する半導体装置は、半導体膜が引っ張り応力を受けるように、導電膜、例えばゲート電極に不純物元素が導入され、絶縁表面上に設けられたpチャネル型TFTを有する半導体装置は、半導体膜が圧縮応力を受けるように、導電膜、例えばゲート電極に不純物が導入されている。【選択図】図6