SEMICONDUCTOR DEVICE

To provide a semiconductor device materializing improvement of deflection accuracy of an electron beam.SOLUTION: The semiconductor device comprises: a first transistor TR1; a second transistor TR2; a first hole 101a; a second hole 101b; a first electrode E1; and a second electrode E2. The first transistor TR1 has: a first semiconductor layer 10; a second semiconductor layer 20; a first multilayer wiring layer 30 having a plurality of laminated first conductive layers; a second multilayer wiring layer 40 having a plurality of laminated second conductive layers; a first gate electrode 32; and a first impurity region 12 in the first semiconductor layer 10. The second transistor TR2 has a second gate electrode 42 and a second impurity region 22 in the second semiconductor layer 20. The first hole 101a penetrates through the first semiconductor layer 10 and the second semiconductor layer 20, the second hole 101b penetrates through the first semiconductor layer 10 and the second semiconductor layer 20. The first electrode E1 is provided in the first multilayer wiring layer 30, and the second electrode E2 is provided in the first multilayer wiring layer 30 and opposed to the first electrode E1 with the first hole 101a interposed between the electrodes E1 and E2.SELECTED DRAWING: Figure 2 【課題】電子ビームの偏向精度を向上させる半導体装置を提供する。【解決手段】半導体装置は、第１の半導体層１０と、第２の半導体層２０と、積層された複数の第１の導電層を有する第１の多層配線層３０と、積層された複数の第２の導電層を有する第２の多層配線層４０と、第１のゲート電極３２と、第１の半導体層１０の中の第１の不純物領域１２とを有する第１のトランジスタＴＲ１と、第２のゲート電極４２と、第２の半導体層２０の中の第２の不純物領域２２とを有する第２のトランジスタＴＲ２と、第１の半導体層１０、及び、第２の半導体層２０を貫通する第１の孔１０１ａと、第１の半導体層１０、及び、第２の半導体層２０を貫通する第２の孔１０１ｂと、第１の多層配線層３０の中に設けられた第１の電極Ｅ１と、第１の多層配線層３０の中に設けられ、第１の孔１０１ａを間に挟んで第１の電極３２に対向する第２の電極４２と、を備える。【選択図】図２