HETEROJUNCTION BIPOLAR TRANSISTOR AND SEMICONDUCTOR DEVICE
To provide an HBT (Heterojunction Bipolar Transistor) of which the destruction due to avalanche multiplication can be suppressed without involving increase in a chip size.SOLUTION: A first sub-collector layer serves as an inflow path of a collector current flowing through a collector layer of a hete...
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| Sprache: | eng ; jpn |
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| Zusammenfassung: | To provide an HBT (Heterojunction Bipolar Transistor) of which the destruction due to avalanche multiplication can be suppressed without involving increase in a chip size.SOLUTION: A first sub-collector layer serves as an inflow path of a collector current flowing through a collector layer of a hetero-junction bipolar transistor. A collector ballast resistance layer having a doping concentration lower than the doping concentration of the first sub-collector layer is disposed between the collector layer and the first sub-collector layer.SELECTED DRAWING: Figure 3
【課題】チップサイズの増大を招くことなく、アバランシェ増倍による破壊を抑制することが可能なＨＢＴを提供する。【解決手段】第１サブコレクタ層が、ヘテロ接合バイポーラトランジスタのコレクタ層を流れるコレクタ電流の流入経路となる。コレクタ層と第１サブコレクタ層との間に、ドーピング濃度が第１サブコレクタ層のドーピング濃度より低いコレクタバラスト抵抗層が配置されている。【選択図】図３ |
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