WIRING LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, SEMICONDUCTOR DEVICE, MULTILAYER WIRING LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, SUBSTRATE FOR MOUNTING SEMICONDUCTOR ELEMENT, METHOD FOR FORMING PATTERN STRUCTURE, MOLD FOR IMPRINTING AND METHOD FOR MANUFACTURING THE SAME, IMPRINT MOLD SET, AND METHOD FOR MANUFACTURING MULTILAYER WIRING BOARD

To form a pattern structure with high accuracy that has a through hole for forming an interlayer connection via and a recessed portion for forming a wiring line.SOLUTION: A method for forming a pattern structure is provided, which includes: a supplying step of supplying a photocurable resist 131 on...

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Hauptverfasser: HOSODA TETSUSHI, SOTODA TEPPEI, FURUKAWA TADASHI, KASAI RYOHEI, FURUGEN RYO, FURUSE AYAKO
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To form a pattern structure with high accuracy that has a through hole for forming an interlayer connection via and a recessed portion for forming a wiring line.SOLUTION: A method for forming a pattern structure is provided, which includes: a supplying step of supplying a photocurable resist 131 on a transfer substrate 121; a contact step of preparing a mold 111 having a mold substrate and an uneven structure located on a main surface of the mold substrate, in which the uneven structure includes a linear protrusion-shaped portion 114 for forming a wiring line and a circular protrusion-shaped portion 115 for forming a pad portion, and a light-shielding layer 116 is present on a plane surface at the apex of the circular protrusion-shaped portion for forming a pad, and then bringing the mold close to the transfer substrate to form a photocurable resist layer 132; a curing step of irradiating the photocurable resist layer with light through the mold 111 side to cure into an insulation material layer 133 as well as allowing the photocurable insulation resist layer located between the light-shielding layer of the mold and the transfer substrate to remain as unexposed; a releasing step of removing the mold from the insulation material layer; and a developing step of developing the insulation material layer.SELECTED DRAWING: Figure 4 【課題】層間接続ビア形成用の貫通孔と配線形成用の凹部とを有するパターン構造体を高い精度で形成する。【解決手段】パターン構造体の形成方法は、転写基材121上に光硬化性レジスト131を供給する供給工程、モールド用基材と、このモールド用基材主面に位置する凹凸構造と、を有し、凹凸構造が配線形成用の線状の凸形状部114と、パッド部形成用の円形状の凸形状部115とを有し、パッド部形成用の円形状の凸形状部の頂部平面に遮光層116を備えるモールド111を準備し、モールドと転写基材を近接させ光硬化性レジスト層132を形成する接触工程、モールド111側から光照射を行い光硬化性レジスト層を硬化させ絶縁材層133とするとともに、モールドの遮光層と転写基材との間に位置する光硬化性絶縁レジスト層を未露光のまま残存させる硬化工程、絶縁材層からモールドを引き離す離形工程及び絶縁材層を現像する現像工程を有する。【選択図】図4