GATE DRIVE CIRCUIT
To further reduce leakage inductance to shorten a gate rise time while reducing coupling capacitance between winding in a pulse width modulation type pulse power supply.SOLUTION: A pulse transformer type gate drive circuit 1 in a pulse power supply comprises: a substrate 10 of a gate drive circuit 1...
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Format: | Patent |
Sprache: | eng ; jpn |
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Zusammenfassung: | To further reduce leakage inductance to shorten a gate rise time while reducing coupling capacitance between winding in a pulse width modulation type pulse power supply.SOLUTION: A pulse transformer type gate drive circuit 1 in a pulse power supply comprises: a substrate 10 of a gate drive circuit 1 that is serially implemented in plural in the pulse power supply; a core 13 that is implemented on the substrate 10 and into which a primary winding 11 of a pulse transformer is inserted; and a secondary winding 12 of the pulse transformer that is implemented on the substrate 10 and is wound about the core 13 with an element wire being loosen into a plurality of bundles.SELECTED DRAWING: Figure 1
【課題】パルス幅変調式パルス電源において、巻線間の結合容量を低減しつつ、漏れインダクタンスをより低減させて、ゲート立ち上がり時間の短縮を図る。【解決手段】パルス電源におけるパルストランス方式のゲート駆動回路1であって、パルス電源に複数直列に実装されるゲート駆動回路1の基板10と、この基板10に実装される一方でパルストランスの一次側電線11が挿通されるコア13と、前記基板10に実装される一方で素線が複数の束にほぐされた状態でコア13に巻線される前記パルストランスの二次側電線12とを備える。【選択図】図1 |
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