SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

To provide a stacked CMOS where an upper-layer surrounding gate electrode acts as a lower-layer gate electrode.SOLUTION: A CMOS composed of stacked P-channel and N-channel MIS field effect transistors comprises: lower semiconductor layers (2, 12) provided on a semiconductor substrate 1; upper semico...

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Bibliographische Detailangaben

1. Verfasser:	SHIRATO TAKEHIDE
Format:	Patent
Sprache:	eng ; jpn
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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