POWER SUPPLY DEVICE

To provide a power supply device equipped with an inrush-current suppressing circuit capable of suppressing not only a rush current but also a re-rush current caused by an instantaneous power interruption or a surge current.SOLUTION: A power supply device comprises: a smoothing capacitor 103 provide...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: NAKANISHI IWAO, YASUDA MARIKO
Format: Patent
Sprache:eng ; jpn
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:To provide a power supply device equipped with an inrush-current suppressing circuit capable of suppressing not only a rush current but also a re-rush current caused by an instantaneous power interruption or a surge current.SOLUTION: A power supply device comprises: a smoothing capacitor 103 provided to smooth fluctuation in an input voltage; a current limiting resistor 113 connected between the input voltage and the smoothing capacitor to limit a rush current; an FET 112 to which a drain and a source are connected in parallel to the current limiting resistor; an auxiliary power supply 130 based on the source of the FET; a measurement part for measuring a voltage between the drain and the source of the FET; and a monitoring circuit 111 supplied with the electric power from the auxiliary power supply for monitoring an output voltage of the measurement part. The monitoring circuit has an inrush-current suppressing circuit 110 which sets the FET off when the output voltage at the measurement part exceeds a first reference voltage value set in the monitoring circuit, and sets the FET on when the output voltage at the measurement part is lower than a second reference voltage value set in the monitoring circuit.SELECTED DRAWING: Figure 1 【課題】突入電流を抑制するだけでなく、瞬停による再突入電流やサージ電流をも抑制することができる突入電流抑制回路を搭載した電源装置を提供する。【解決手段】入力電圧の変動を平滑するために設けられる平滑コンデンサ103と、入力電圧と平滑コンデンサとの間に接続され、突入電流を制限するための電流制限抵抗113と、電流制限抵抗に並列にドレインとソースを接続したFET112と、FETのソースを基準とした補助電源130と、FETのドレインとソースの間の電圧を測定する測定部と、補助電源から電力を供給されて測定部の出力電圧を監視する監視回路111と、を備える。監視回路は、測定部の出力電圧が監視回路の有する第一の基準電圧値を超えた場合にFETをオフさせ、測定部の出力電圧が監視回路の有する第二の基準電圧値を下回った場合にFETをオンさせるように構成された突入電流抑制回路110を備える。【選択図】図1