SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME, AND INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

To provide a semiconductor chip that enables high speed and high integration, and to provide a method of manufacturing the same, and an integrated circuit device and a method of manufacturing the same.SOLUTION: An integrated circuit device 1 comprises: a support substrate 11; a first semiconductor c...

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Bibliographische Detailangaben
Hauptverfasser: KIMIZUKA AKIRA, CHORI KANJI, YAMAMOTO TAKESHI, INODO HIDEKAZU, HABU MARIKO
Format: Patent
Sprache:eng ; jpn
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Zusammenfassung:To provide a semiconductor chip that enables high speed and high integration, and to provide a method of manufacturing the same, and an integrated circuit device and a method of manufacturing the same.SOLUTION: An integrated circuit device 1 comprises: a support substrate 11; a first semiconductor chip 10A and a second semiconductor chip 10B provided on the support substrate; and a connection member 12 formed of a solder. Each of the first semiconductor chip and the second semiconductor chip has a semiconductor substrate, a wiring layer 21 provided on the semiconductor substrate, and a pad 40 provided on a lateral face of the wiring layer. The connection member is contacted with a lateral face of a pad of the first semiconductor chip and a lateral face 40b of a pad of the second semiconductor chip.SELECTED DRAWING: Figure 2 【課題】高速化及び高集積化が可能な半導体チップ及びその製造方法、並びに、集積回路装置及びその製造方法を提供する。【解決手段】集積回路装置1は、支持基板11と、支持基板上に設けられた第1半導体チップ10A及び第2半導体チップ10Bと、半田からなる接続部材12と、を備える。第1半導体チップ及び前記第2半導体チップは、それぞれ、半導体基板と、半導体基板上に設けられた配線層21と、配線層の側面上に設けられたパッド40と、を有する。接続部材は、第1半導体チップのパッドの側面と、第2半導体チップのパッドの側面40bに接している。【選択図】図2