SEMICONDUCTOR DEVICE

To provide a highly-integrated semiconductor device.SOLUTION: A semiconductor device includes a first memory unit, a first peripheral circuit unit, and a second peripheral circuit unit arranged side by side on a substrate. When being viewed from a plane, the semiconductor device also includes a seco...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KIM BONG-SOO, HWANG YOO-SANG, KIM YOUNGBAE, KYO KISAI, HONG HYEONG-SUN, KIM SUNGWOO, KOH GWANHYEOB
Format: Patent
Sprache:eng ; jpn
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Beschreibung
Zusammenfassung:To provide a highly-integrated semiconductor device.SOLUTION: A semiconductor device includes a first memory unit, a first peripheral circuit unit, and a second peripheral circuit unit arranged side by side on a substrate. When being viewed from a plane, the semiconductor device also includes a second memory unit provided on one side of the second peripheral circuit and laterally separated from the first memory unit. The first memory unit includes a plurality of first memory cells, and each of the first memory cells includes a cell transistor and a capacitor connected to one terminal of the cell transistor. The second memory unit includes a plurality of second memory cells, and each of the plurality of second memory cells includes a variable resistive element and a selection element serially connected to each other. Each second memory cell is provide at a height higher than the capacitor from the substrate.SELECTED DRAWING: Figure 7 【課題】 高集積化された半導体デバイスを提供する。【解決手段】 半導体デバイスは、基板上に並べて配置される第1メモリ部、第1周辺回路部、及び第2周辺回路部を含む。前記半導体デバイスは、平面から見る時、第2周辺回路部の一側に提供されて第1メモリ部から横に離隔される第2メモリ部を含む。第1メモリ部は複数の第1メモリセルを含み、第1メモリセルの各々はセルトランジスタ及び該セルトランジスタの一端子に接続されるキャパシターを含む。第2メモリ部は複数の第2メモリセルを含み、第2メモリセルの各々は互いに直列に接続される可変抵抗素子及び選択素子を含む。第2メモリセルは前記基板から前記キャパシターより高い高さに提供される。【選択図】 図7