AMPLIFIER CIRCUIT
PROBLEM TO BE SOLVED: To provide an amplifier circuit capable of suppressing waveform distortion caused by charge and discharge of a junction capacitance generated between a gate and a drain or between a base and a collector, in a case where a junction field effect transistor or a bipolar transistor...
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Format: | Patent |
Sprache: | eng ; jpn |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To provide an amplifier circuit capable of suppressing waveform distortion caused by charge and discharge of a junction capacitance generated between a gate and a drain or between a base and a collector, in a case where a junction field effect transistor or a bipolar transistor is used as an amplification element of the amplifier circuit.SOLUTION: An amplifier circuit comprises: a junction field effect transistor 3; and a variable capacitance element 4 connected between a gate of the junction field effect transistor 3 connected with an input terminal 2, and a power supply terminal 1, and whose capacitance value is changed depending on an input voltage applied to the input terminal 2. A diode or a junction field effect transistor whose source and drain are connected in common, is preferably used as the variable capacitance element 4, for example.SELECTED DRAWING: Figure 1
【課題】増幅回路の増幅素子として接合型電界効果トランジスタ又はバイポーラトランジスタを用いた場合に、ゲートとドレインの間又はベースとコレクタの間に生じる接合容量の充放電を起因とする波形歪を抑制することができる増幅回路を提供する。【解決手段】接合型電界効果トランジスタ3と、入力端子2に接続された接合型電界効果トランジスタ3のゲートと電源端子1の間に接続され、入力端子2に印加される入力電圧に応じて容量値が変化する可変容量素子4と、を備えた。可変容量素子4としては、例えばダイオードやソースとドレインを共通接続した接合型電界効果トランジスタが好適である。【選択図】図1 |
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